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uPSD 3254 memory map

dshah08
Associate II
Posted on November 22, 2004 at 19:31

uPSD 3254 memory map

1 REPLY 1
dshah08
Associate II
Posted on May 17, 2011 at 12:03

I think I have a better understanding of memory mapping within uPSD3254.

1. Map lower codespace(0000 to 7FFF) to secondary flash

2. Map Main 256K Fllash to 8000 to FFFF code space with page select bits

3. Map lower 32k of Data space to internal ram

4. Map upper 32K of Data space to external ram.

Now the question is

a. Can I access the external 32k in upper 32K data space(8000 to FFFF) without any paging ? Since page register is being used for the main flash how can I page the Sram ?

b. If I want to use 64K SRAM externally how would I page it ?

🙂