Posted on January 22, 2005 at 00:05In my timer interrupt, I update DAC through ext. bus. I want to ensure that DAC update interval is precisely identical, but interrupt latence is affected by many factors.
How to make the interrupt latence is identical between two timer interrupts?
I make CPU enter IDLE state after timer interrupt subroutine and make CPU remain IDLE before timer interrupt request. Is this feasible?
