Illegal opcode

luter · ‎2006-02-28

Posted on March 01, 2006 at 08:50

Illegal opcode

luter · ‎2006-02-23

Posted on February 24, 2006 at 06:31

Hello.

I wanna force micro to make selfreset by executing of illegal opcode. Can anybody suggest me any illegal opcodes?

Tnx.

luter · ‎2006-02-23

Posted on February 24, 2006 at 07:06

I found :-]

0x31, 0x32, 0x3b, 0x41, 0x65, 0x72

right?

wolfgang2399 · ‎2006-02-23

Posted on February 24, 2006 at 08:03

Hi Luter,

to reset my ÂµC I use

- starving the watchdog in an endless loop or

- setting WDGCR to 0xFF followed by 0x80 (clearing T6).

You can also use the HALT instruction with WDG is activated (but: see chapter 11.1.4.1).

WoRo

luter · ‎2006-02-24

Posted on February 24, 2006 at 09:36

To woro.

I need to distinguish between wdg reset and my own reset when micro starts up. illegal opcode execution does not set wgd reset flag in SICSR.

What do u mean under ''chapter 11.1.4.1'' ? What kind of an is it?

wolfgang2399 · ‎2006-02-27

Posted on February 28, 2006 at 05:09

Sorry I forgot about to say: I refere to the main document - the datasheet.

I wouldn't take an illegal opcode to restart because you never can be sure they will abide this instruction. They might change it at any time without notice.

Alternation: Fix a memory cell e.g. with 0xA5 before triggering the watchdog and read this before initialising your memory.

WoRo

luter · ‎2006-02-27

Posted on February 28, 2006 at 08:16

Quote:

On 28-02-2006 at 09:39, Anonymous wrote:

Sorry I forgot about to say: I refere to the main document - the datasheet.

I am still not getting you. What type of datasheet do u mean?

Quote:

I wouldn't take an illegal opcode to restart because you never can be sure they will abide this instruction. They might change it at any time without notice.

Alternation: Fix a memory cell e.g. with 0xA5 before triggering the watchdog and read this before initialising your memory.

WoRo

Tnx for advice, but my micro st7mc2 has flash memory only, and it is a bit complex to store some byte there.

wolfgang2399 · ‎2006-02-28

Posted on February 28, 2006 at 10:08

Hi Luter,

sorry I supposed a ST7Lite2x but with your micro you must read:

But: see chapter 10.1.4 Using Halt Mode with the WDG.

What I mean with the memory cell is that you can determine any unused RAM cell, set it to a special value e.g. 0xA5 and then force a watchdog reset. Immediately after a reset you should fetch the value and reset the RAM memory to a base value e.g. 0x00. Thus checking the fetched value you can recognise whether you have passed a tagged (0xA5) watchdog reset or not (0x00).

WoRo

luter · ‎2006-02-28

Posted on February 28, 2006 at 11:16

Now, I understand your idea. It is pretty good. But are u sure that reset doesn't disturb ram memory? As far as i know the content of ram memory is undefined after reset. Is anywhere notice about memory state after reset? I would be very appreciated if u give me a link.

luca239955_st · ‎2006-02-28

Posted on March 01, 2006 at 03:46

Be careful if you do that (use a special ram location as the flag for the type of reset) in C, as the standard startup code will clear your flag before you have a chance to test it; you will have to use a special version (customized by yourself) of the startup code.

Regards,

Luca