Posted on June 07, 2007 at 01:25Hello,
I'm trying to use the SSP0 of STR750 as an SPI slave.
An external 16bit ADC is the SPI master and I want to configure the STR750 as a SPI slave with following parameters.
- SS managed by software
- 16 bit data
- Data is captured on 1st clock edge(CPHA=0)
- SCK is held low when no data (CPOL=0)
- Receive Timeout interrupt(RTIM=1)
According to the datasheet(Figure 101. Generic NSS timing diagram)
Slave NSS should be pulled high between each byte transfer.
Does it mean I should control SSI bit at each byte transfer?
How can I implement this?
Here is my source code : (for simplicity, I removed some lines)
#define CR0_CPHA 0x0080 // 0=1st edge capture, 1=2nd edge capture
#define CR0_CPOL 0x0040 // 0=SCK held low when no transmit
#define CR0_16BIT 0x000F // 16-bit data
#define CR1_SSI 0x0020 // 0= slave selected when SSM=1, 1-deselect
#define CR1_SSM 0x0010 // 1= SS managed by SW
#define CR1_MS 0x0004 // 1=slave
#define CR1_SSE 0x0002 // 0=SSP disabled, 1=SSP enabled
// Motorola SPI, 16bit Data
#define SSP_CR0_INIT (CR0_16BIT)
#define SSP_CR1_INIT (CR1_SSM | CR1_MS | CR1_SSE)
Initialize()
{
// config P0.06 (MISO), P0.07 (MOSI), P0.05 (SCLK), P0.04 (NSS)
// as alternate function, push-pull
GPIO_Config(GPIO0, (GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7),GPIO_Mode_AF_PP);
SSP0->CR0 = SSP_CR0_INIT;
SSP0->CR1 = SSP_CR1_INIT;
SSP0->IMSCR |= (IMSCR_RTIM | IMSCR_RORIM);
}
SPI_Interrupt()
{
status = SSP0->MISR;
if (status & MISR_RTMIS)
{
for (i=0; i
{
Data[i] = SSP0->DR;
}
SSP0->ICR = 0; // clear flags
}
}
It doesn't work with CPHA=0.
All signals from external ADC were correct.
Please add your comments to make this code working.
Best Wishes,
Byung-Tae Jung
