Access external device with EMI

redapple_1982 · ‎2005-11-22

Posted on November 23, 2005 at 00:29

redapple_1982 · ‎2005-11-10

Posted on November 11, 2005 at 04:30

Hi 🙂

I've designed to access a Photo Sensor with the External Memory Interface,and tried to config like this:

EMI_Config(2, EMI_ENABLE | EMI_WAITSTATE(15) | EMI_SIZE_16);

I didn't use CS2, and only used A2 to A10.

But I found that the Address Bus was invalid immediately at the mommet nRD became high.I connected one probe to the nRD pin,and the other to A2.The oscilloscope showed that if the A2 was '1' when nRD was low, it fell to '0' at once when nRD became high, both edges of the two signals were same at time axis.So I couldn't get a valid address to access the photo sensor.

But According to the user manual, the address and data will hols one cycle after the WE or RD is invalid.

Please help,thanks!

davidbellegarde9 · ‎2005-11-21

Posted on November 22, 2005 at 06:46

About the read timing:

Regarding the datasheet, tRAH is about 3ns. It means the latch of a data during a read access occurs one cycle time before the rise of the read signal. The address signals could switch when the read signal rises because there is tRAS which is 1.5*tMCLK. The address should be not valid anyway because it was latched by the chip.

About the write timing:

It is quiet the same but the data are driven by the device.

These timings are valuable with most of SRAM and flash memories but for an ethernet chipset or a LCD screen, additionnal hardware should be added in order to follow the specification of this kind of devices. Perhaps the photo sensor needs extra hold time delay on read and write signals.

Regards.

redapple_1982 · ‎2005-11-22

Posted on November 23, 2005 at 00:29

Hi 🙂

Do you mean the real timmings are inconsistent with the information offered in the datasheet?

Regards