Posted on June 02, 2006 at 07:54HDLC :
1)OK
On APB1 we have 32MHz and we are using for the hdlc clock the APB1 clock and with the prescaler we have 64kHz and nothing is connected on P1.13
GPIO_Config (GPIO1, 0x2000, GPIO_IN_TRI_CMOS);//P1.13
GPIO_Config (GPIO1, 0x4000, GPIO_IN_TRI_CMOS); //P1.14
GPIO_Config (GPIO1, 0x8000, GPIO_AF_PP);//P1.15
HDLC_XmitClockSourceConfig(HDLC_CKSource);
HDLC_XmitBaudrateConfig(249);
HDLC_RecvClockSourceConfig(HDLC_CK);
HDLC_RecvClockPrescalerConfig(30);
We have data on P1.14 and TX on P1.15
In this case our system is working well, we are receiving what we want
2) not OK
On APB1 we have 32MHz and we are using for the hdlc clock the P1.13 clock and the timer 1 is creating a 64kHZ P1.7 : we connect P1.7 with P1.13
GPIO_Config (GPIO1, 0x2000, GPIO_IN_TRI_CMOS);//P1.13
GPIO_Config (GPIO1, 0x4000, GPIO_IN_TRI_CMOS); //P1.14
GPIO_Config (GPIO1, 0x8000, GPIO_AF_PP);//P1.15
HDLC_XmitClockSourceConfig(HDLC_HTXCKSource);
HDLC_XmitBaudrateConfig(7);
HDLC_RecvClockSourceConfig(HDLC_HRXCK);
HDLC_RecvClockPrescalerConfig(0);
GPIO_Config (GPIO1, 0x0080, GPIO_AF_PP);//P1.7
TIM_Init(TIM1);
TIM_ClockSourceConfig(TIM1,TIM_INTERNAL);
TIM_PrescalerConfig ( TIM1, 0 );
TIM_PWMOModeConfig ( TIM1, 250, TIM_HIGH, 500, TIM_LOW );
TIM_CounterConfig ( TIM1, TIM_START );
In this case we just receive on stuff but not all and after nothing?
3)OK
On APB1 we have 32MHz and we are using for the hdlc clock the APB1 clock and with the prescaler we have 64kHz and we connect P1.13 with P1.7
GPIO_Config (GPIO1, 0x2000, GPIO_IN_TRI_CMOS);//P1.13
GPIO_Config (GPIO1, 0x4000, GPIO_IN_TRI_CMOS); //P1.14
GPIO_Config (GPIO1, 0x8000, GPIO_AF_PP);//P1.15
HDLC_XmitClockSourceConfig(HDLC_CKSource);
HDLC_XmitBaudrateConfig(249);
HDLC_RecvClockSourceConfig(HDLC_CK);
HDLC_RecvClockPrescalerConfig(30);
GPIO_Config (GPIO1, 0x0080, GPIO_AF_PP);//P1.7
TIM_Init(TIM1);
TIM_ClockSourceConfig(TIM1,TIM_INTERNAL);
TIM_PrescalerConfig ( TIM1, 0 );
TIM_PWMOModeConfig ( TIM1, 250, TIM_HIGH, 500, TIM_LOW );
TIM_CounterConfig ( TIM1, TIM_START );
We have data on P1.14 and TX on P1.15
In this case our system is working well, we are receiving what we want
M4 :
Not OK
GPIO_Config(GPIO1,0x4000,GPIO_IN_ TRI _ CMOS);//P1.14data RX
GPIO_Config(GPIO1,0x8000,GPIO_OUT_PP);//P1.15 data TX
GPIO_Config(GPIO1,0x2000,GPIO_IN_TRI_ CMOS);//P1.13 clock + interrupt
XTI_LineModeConfig(XTI_Line7,XTI_FallingEdge);
XTI_LineConfig(XTI_Line7,ENABLE);
XTI_ModeConfig(XTI_Interrupt,ENABLE);
EIC_IRQCOnfig(ENABLE);
it :
XTI_IRQHandler(void)
{
_interrupt_line=XTI_InterruptLineValue();
switch(_interrupt_line)
{
case XTI_Line7 :
_data[i++]=GPIO_BitRead(GPIO1,14);
break;
...
}
}
P1.13 is a clock and on every falling edge we are reading the P1.14 :
What we see with the equipment
- when there is a falling edge, if the data P1.14 is one we have the interrupt
- when there is a falling edge, if the data P1.14 is zero we don’t have the interrupt if it’s the first time the data P1.14 is zero
P1.13---- ----------- ----------- ---------
|1 | | 2 | | 3 |
| | | | | |
-------- ---------- ----------
P1.14--------------
data |
|
-----------------------------------------------------
1 : we have the interrupt and we read data = 1
2 : we don’t have the interrupt
3 : we have the interrupt and we read data = 0
P1.14 is interferring on P1.13?
strange.
If we are using P0.11 instead of P1.13 it is good working : strange.
Is there a problem when we are using together pin P1.13 and P1.14 in HDLC or not in HDLC also?
