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Clock handling STR71x

sven239955
Associate II
Posted on November 09, 2006 at 02:49

Clock handling STR71x

6 REPLIES 6
sven239955
Associate II
Posted on September 29, 2006 at 11:58

1. Before we enter the LPWFI mode we externally stop the CK clock (2MHz).

(Which is selected and used with PLL (->24MHz)).

2. After stopping the clock we enter the LPWFI mode (RCCU->SMR &= 0xFE).

Which clock is used after the CK clock is not running more

and the cpu Enter LPWFI mode?

pete3
Associate II
Posted on September 29, 2006 at 12:53

MCLK ( i.e. to the core) is stopped and peripherals run from the CLK2 (/16) or 32kHz alternate clock. P40 of the reference manual should help you. PP43-44 describe ways to reduce power consumption even further.

When an interrupt is generated the MCLK is restored and the CPU continues operation. This causes the interrupt routine to be executed.

sven239955
Associate II
Posted on October 03, 2006 at 05:25

Yes, but my question is before entering LPWFI mode.

First we cut-off the used CK clock and then we execute the operation enter LPWI.

Which clock will the cpu execute this operation with, when the CK clock not is running?

hichem2
Associate II
Posted on October 03, 2006 at 07:43

Hi SNL,

When using the LPWFI mode the first step is to Select the clock to be used by peripherals :( CLK2/16 or CK_AF)

(WFI_CKSEL bit of the RCCU_CCR register).

For more details please refer to AN2100.

Regards,

Hich

sven239955
Associate II
Posted on October 03, 2006 at 09:10

Hi!

See my question below.

// Prepare LPWFI

FLASHR->CR0|=0x8000; // disable the flash during the LPWFI

RCCU->CCR &=~0x2; //select CLK2/15 as peripherals clock during LPWFI

RCCU->CCR |=0x1; //set bit LOPWFI for selecting LPWFI mode

PCU->PWRCR |=0x8000; //disable MVR during WFI mode

PCU->PWRCR |=0x0010;

DUC_HW->StopClock = 0; // Stops external 2MHz clock to CPU (The clk stops directly)

// The CPU executes with clock xxx??? Not yet in LPWFI mode, next line will enter LPWFI mode. Which clock is used now?

RCCU->SMR &=0xFE; //enter the LPWFI mode

kleshov
Associate II
Posted on November 09, 2006 at 02:49

Doesn't the microcontroller reference manual say what will happen? I had a quick look, and my understanding is that when you disable external clock, the PLL will keep running for a while (maybe a few microseconds, who knows) until it looses its lock on external frequency. After that system clock switches to CLK2, which is stalled. If in those few microseconds you manage to do everything you need, then you're in luck.

The question is, what's going to provide you the clock in LPWFI mode? Right now it looks like your MCU will stall.

Regards,

- mike