Posted on May 17, 2011 at 09:45Hi,
if you set TIM0_OC2R = TIM0_OC1R = YOUR_VALUE you generate a 50% Duty-Cycle on your timer. (Route it on a Port Pin an you'll see it)
With YOUR_VALUE you'll setting up the time an irq occurs.
I work with this solution:
void init_timer_0 (void)
{
SCU_PRR1 |= 0x1; // Disable Reset from timer 0
SCU_PCGR1 |= 0x1; // Clock enabling to timer 0
TIM0_CR1 |= 0x40; // Enable Output Compare
TIM0_CR1 |= 0x10; // Enable PWM
TIM0_CR2 = 0x007f; // Set the prescaler to PCLK/256
TIM0_CR1 |= 0x100; // Outputlevel 1
TIM0_CR1 &=~ 0x200; // Outputlevel 2
TIM0_OC2R = 0xf5; // Set the Period of the signal (1ms @ 16MHz)
TIM0_OC1R = 0xf5; // Set the lenght of the Pulse (1ms @ 16MHz)
TIM0_CR2 |= 0x800; // Enable the Interrupt, when a match occurs
VIC0_VA4R = (unsigned int)irq_handler_timer0; // Set the address of the timer 0 ISR
VIC0_VC4R = 0x24; // Use slot 4 for timer 0 interrupt
VIC0_INTER |= 0x10; // Enable Timer 0 IRQ (Bit 4)
}
void irq_handler_timer0(void) // Generated by Timer 0
{
// your code here
VIC0_VAR = 0; // Acknowledge Interrupt VIC0
VIC1_VAR = 0; // Acknowledge Interrupt VIC1
TIM0_SR =0; // Delete the interrupt bit at the End of the irq-routine!!!
}
