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GPIO pin control

akaiser9
Associate II
Posted on April 10, 2007 at 16:42

GPIO pin control

1 REPLY 1
akaiser9
Associate II
Posted on May 17, 2011 at 09:41

I failed when trying to correlate and decode the various bits of

information concerning the GPIO port pins.

Sources:

REF: STR91xF reference manual.

DS: STR91xF datasheet.

PL: ARM PrimeCell PL061 documentation.

Infobits:

I1: According to DS 4.1, pin state can always be read as input.

I2: PL suggests, that data read always reflects the PrimeCell input

even when programmed as output.

I3: According to REF 3.3 figure 22, the GPIO read logic receives 0 for

all pins programmed as output.

I4: According to REF 3.4.1, the GPIO data register reads the last

value written to, for pins programmed as output.

Questions:

Q1: Is it true, that (I1) only holds for pins programmed as input?

Q2: REF 3.3. figure 22 lacks information on which bits are used to

enable the pin driver. There are 2 possible sources: the

direction control of the PrimeCell (GPIO_DIR) and and the pin

function control of the SCU (SCU_GPIOOUT). The figure shows a

driver which is only controlled by SCU_GPIOTYPE, not by GPIO_DIR

or GPIOOUT.

Q3: IMHO (I2), (I3) and (I4) cannot all be true, if the ''GPIO read

logic'' block in REF 3.3. figure 22 reflects the PrimeCell. So

what is really read for pins programmed as output? The last state

written to it, the state of the pins or 0? The pin state need not

be idential to the output register state, if the output is

programmed as ''open collector''.

Q4: If the answer to Q3 is not ''pin state'', then how is it possible to

connect a pin to a bidirectional open collector bus (such as used by

Dallas 1-Wire devices)? How can it be avoided to explicitly

switch the pin direction twice for each bit received?

Background: Depending on the system environment, it may be

necessary to mask interrupts for each GPIO_DIR or SCU

read/modify/write sequence.

[ This message was edited by: prx on 10-04-2007 20:13 ]