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EMI Mux Mode A16 & A17 Not working

martinhillier9
Associate II
Posted on March 09, 2009 at 11:11

EMI Mux Mode A16 & A17 Not working

1 REPLY 1
martinhillier9
Associate II
Posted on May 17, 2011 at 09:58

Hi all,

We have a 4mb (256k x 16) SRAM connected to the EMI as 16bit at CS0, we can read & write up to A15, but writes to A16-A17 do not work, although we can see activity on A16-A17, we are unsure if this is at the correct time.

Any Ideas??

Here is the setup:

/* GPIO7 Configuration */

GPIO_DeInit(GPIO7);

GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2;

GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull;

GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2 ;

GPIO_Init (GPIO7, &GPIO_InitStructure);

/* GPIO0 Configuration CS0 & 1 & 2*/

GPIO_DeInit(GPIO0);

GPIO_InitStructure.GPIO_Direction = GPIO_PinOutput;

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6;

GPIO_InitStructure.GPIO_Type = GPIO_Type_PushPull;

GPIO_InitStructure.GPIO_Alternate = GPIO_OutputAlt2;

GPIO_Init (GPIO0, &GPIO_InitStructure);

/***** EMI Setup *****/

/* Enable the clock for EMI*/

SCU_AHBPeriphClockConfig(__EMI | __EMI_MEM_CLK, ENABLE);

SCU_AHBPeriphReset(__EMI | __EMI_MEM_CLK,DISABLE);

/*BCLK=96Mhz*/

SCU_EMIBCLKDivisorConfig(SCU_EMIBCLK_Div1);

/*Enable the Mux mode*/

SCU_EMIModeConfig(SCU_EMI_MUX);

/*ALE length and polarity definition*/

SCU_EMIALEConfig(SCU_EMIALE_LEN1, SCU_EMIALE_POLHigh);

/* EMI Address/Data GPIO Setup */

GPIO_EMIConfig(ENABLE);

/* EMI default configuration : Reset configuration*/

EMI_DeInit();

//Bank 0 CS0

EMI_StructInit(&EMI_InitStruct);

/* Number of bus turnaround cycles added between read and write accesses.*/

EMI_InitStruct.EMI_Bank_IDCY = 0x3;

/* Number of wait states for read accesses*/

EMI_InitStruct.EMI_Bank_WSTRD = 0x1f;

/* Number of wait states for write accesses*/

EMI_InitStruct.EMI_Bank_WSTWR = 0x1f;

/*Output enable assertion delay from chip select assertion*/

EMI_InitStruct.EMI_Bank_WSTROEN = 0x3;

/*Write enable assertion delay from chip select assertion*/

EMI_InitStruct.EMI_Bank_WSTWEN = 0x3;

/*This member Controls the memory width*/

EMI_InitStruct.EMI_Bank_MemWidth = EMI_Width_HalfWord;

/*Write protection feature */

EMI_InitStruct.EMI_Bank_WriteProtection = EMI_Bank_NonWriteProtect;

/*Use Bank0 (CS0)*/

EMI_Init( EMI_Bank0, &EMI_InitStruct);