Posted on December 28, 2009 at 19:30Dear sir..
Please help me. ASAP!!
I need Set ST7FLITE15B single Timer OUTPUT COMPARE mode 50us Interrupt. I'm use Comsic complier. I have use Same setting in ST7Flite05 long time ago and Very good Setting,But ST7FLITE15B always have some problem.
1.I have use scope to watch PortA ZERO's signal. Always have error 50us HZ. That's unstable signal.
2.Same setting use in Lite05,that's very good. The Lite05 mcu will output correct 50us signal.
3.I guess ATCSR2's Tran1 Bit have some problem. I have been try some way to fix this issue. But always let me very disappointment.
4.This project is very ungert. My fist generation product use OP and have been received 200k/M until 2013 and have been M/P now. New project Need MCU to do something fine up ctmr's request and I have been use STFOXA1 finish prototype let ctmr evaluated it. But STFOXA1 have capacitive power supply RESET probelm can't solve. So I will change to ST7Flite15B. My ctmr:Home People, Walmart.....!!
Please help me ~~~~~!!
Code List below:
#include ''Io7FLite1.h'' // ST7Flite0 memory and registers mapping
#include ''lib_bits.h'' // Predifined libraries working at bit level
#include ''bitdef.h'' // This file defines the names of the bits
@tiny volatile static u16 Total;
@tiny volatile static u8 TT;
void main(void)
{
SysInitial();
while (1)
{
WDGCR = 0x7F;
ChgBit(PADR,TWO);
}// While loop
} // main loop
@interrupt void LART_OCMP_IT_Routine(void)
{
Total = (DCR0H <<
😎 + DCR0L;
Total = Total + 410;
DCR0H = (Total >> 8);
DCR0L = Total;
ClrBit(PWM0CSR,ZERO);
ChgBit(PADR,ZERO);
}
void SysInitial(void)
{
_asm(''sim'');
SetBit(PLLTST,SEVEN);
PADDR = 0xFF;
PAOR = 0xFF;
PADR = 0x00;
PBDDR = 0xFF;
PBOR = 0xFF;
PBDR = 0x00;
PCDDR = 0x03;
SetBit(WDGCR,SEVEN);
SetBit(ATCSR,CMPIE); // CMPF interrupt enabled
ClrBit(PWMCR,OE0); // Output compare enable
DCR0H=0x03;
DCR0L=0x00;
SetBit(ATCSR,FOUR); // fCounterClock = fCPU
ClrBit(ATCSR,THREE);
RCCR= RCCRH; // about 8 MHz 68 for 25kHZ 128 for 20kHZ
if(!ValBit(RCCRL,ZERO))
{
ClrBit(SICSR,FIVE);
}
if(!ValBit(RCCRL,ONE))
{
ClrBit(SICSR,SIX);
}
_asm(''rim''); // Enable Interrupts (using assembler language)
}
Jones.Lin
[ This message was edited by: Ferrari on 29-12-2009 00:00 ]
