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interupt latency

per3
Associate II
Posted on December 20, 2007 at 10:18

interupt latency

2 REPLIES 2
16-32micros
Associate III
Posted on May 17, 2011 at 12:20

Hi espresso_solo,

as GPIO pins are mapped on the fast APB bus at the same frequency as the CPU the interrupt latency is only the path from APB to the CPU then the entry to IRQ routine as detailed by the Cortex-M3 Technical Reference Manual on www.arm.com .

Regards, STOne-32

[ This message was edited by: STOne-32 on 20-12-2007 14:48 ]

per3
Associate II
Posted on May 17, 2011 at 12:20

What is the interupt latency för the stm103X?

Specifacally the interupt latency for a level shift on one of the GPIO pins.

I suppose it depends on clock speed.