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Independent watchdog and standby mode

trevor1
Associate II
Posted on July 09, 2008 at 10:38

Independent watchdog and standby mode

4 REPLIES 4
trevor1
Associate II
Posted on May 17, 2011 at 12:39

I'm using the independent watchdog but I can't see how to disable the it when in standby mode. The LSI clock (the clock used by the watchdog) cannot be disabled while the watchdog is running.

I don't want the extra power consumption of the watchdog and LSI clock when in standby mode and I don't want the watchdog continually bringing the micro out of standby mode.

Code:

void start_watchdog(void)

{

while (IWDG->SR & 0x3); // wait for previos update operations to complete

IWDG->KR = 0x5555; // Enable independent watchdog register access

IWDG->PR = 6; // prescaller set to divice by 256 (min 6.4ms, max 26214.4ms)

IWDG->RLR = 0xFFF; // reload value (0xFFF max)

IWDG->KR = 0xCCCC; // start the watchdog

}

void stop_watchdog(void)

{

RCC_LSICmd( DISABLE ); // disable low speed internal clock used by watchdog -- !! can't do this!!

}

void stroke_watchdog(void)

{

IWDG->KR = 0xAAAA;

}

Any ideas?

Regards

Trevor

niklas
Associate II
Posted on May 17, 2011 at 12:39

Hi Trevor,

We had this discussion at a STM32 seminar I attended to and as I understand it you have to ''kick'' the independant watchdog all the time. It cannot be stopped except when in debug mode. The longest timeout that can be used is 17.4 s @60kHz. This means you have to wakeup from standby at least every 17th second to kick the watchdog.

I will not use the independant watchdog 🙂

/Miklas

trevor1
Associate II
Posted on May 17, 2011 at 12:39

Hi Miklas,

Thanks for your reply.

I guess as a ''dirty hack'' I could program a backup register with a certain value, say 0xDEADBEEF, and then reset. On reset if I read this value I zero it and go into standby without enabling the independent watchdog.

If on reset I read anything other than 0xDEADBEEF I enable the watchdog and continue to run my application.

Trevor

niklas
Associate II
Posted on May 17, 2011 at 12:39

Hi Trevor

Interesting idea. Perhaps you don't even need to mess around with the backup registers since it is possible to determine the cause to reset by reading RSS_CSR. ''If software reset then standby else run as normal'' or something like that

/Niklas

PS. It should be Niklas, I made a typo in my first post 🙂