Open drain input voltages

[russ]

Posted on August 29, 2008 at 10:54

Open drain input voltages

[russ]

Posted on May 17, 2011 at 12:43

This is a question that I have seen asked numerous times and have yet to see an answer for it...

If an I/O is configured as open drain can it deal with voltages higher than 5V? Example: An LED, supplied with 12v, is actuated by pulling the open drain output to ground. 12V ------ (anode)___LED___(cathode) -------- I/O (open drain) 12V................-i>|-................... OD/GND [ This message was edited by: russ1 on 29-08-2008 00:12 ]

[miles]

Posted on May 17, 2011 at 12:43

Table 6, page 37 of

http://www.st.com/stonline/products/literature/ds/14611.pdf

under section 5.2 ''Absolute maximum ratings'', says that the max ''Vin'' voltage of a 5V tolerant pin is 5.5V, and of any other pin is Vdd+0.3V. That is of course an ''Input voltage'' as the next column of the table says, so it may or may not apply to pins configured as outputs. Page 75 of the

http://www.st.com/stonline/products/literature/rm/13902.pdf

shows the basic structure of standard and 5V tolerant I/O pins. It looks like the protection diodes will dump over-voltage into Vdd or Vdd_ft, regardless of if the pin is an input or output, with pullup enabled or disabled, and open-drain enabled or disabled. The protection diodes are hard-wired right to the Vdd/Vdd_ft symbols. I just read up on diodes a bit on wikipedia, they say there's various types with a forward 'on' voltage drop ranging from 0.2V to 0.7V. Perhaps that's where the Vdd+0.3V claim comes from? They are using a diode with a forward voltage drop of 0.3V, meaning you can apply Vdd+0.3V to the pin, without it raising Vdd? - Miles PS: Personally, I've been considering Table 6 to apply to both inputs and outputs, but I'd be glad to hear official confirmation from ST. [ This message was edited by: miles.gazic on 29-08-2008 01:03 ]

[russ]

Posted on May 17, 2011 at 12:43

Thanks. This is the best reply I have seen. It doesn't look like I can do what I was hoping for. FET time!

[russ]

Posted on May 17, 2011 at 12:43

Even if it was possible to put 12v on the pin when configured in open drain mode there would be problems when the pin went into its floating state upon a reset condition. Alas.

[lanchon]

Posted on May 17, 2011 at 12:43

no, it can't handle high voltages. cmos circuits need protection from static discharge and to avoid latch-up. normally diodes are used to clamp voltages between the supply rails. in higher-than-Vdd tolerant circuits, some other mechanism (such as a zener diode) is used. (in the stm32, the mechanism is hidden behind the Vdd_ft line.)

note that in the general case it's very bad practice to design your circuit relaying on these diodes.

[jj]

Posted on May 17, 2011 at 12:43

When I see 12V AND Led I think of a series string of white Leds. Otherwise why ''start'' with this unacceptable voltage?

3V3 - required by the STM32 - will properly drive most Leds - including some of the newer white & some blue. If you can reduce your source drive voltage to 5V - and your drive pin is 5V compatible - it appears you will be ok. As for float during reset - don't most micros behave in this manner? And - since it's a visual indicator - (on so briefly during reset that it may not be notable) why does this matter? [ This message was edited by: jj.sprague on 29-08-2008 14:26 ]