Posted on May 17, 2011 at 09:59I'm implementing the workaround for the STR9 errata 2.5 ''Flash frequency limitation when programming'' and discovered that the EMI_BCLK might be affected when I change the FMICLK frequency. I'm using the BCLK to drive a PLL in an FPGA and the PLL is losing lock temporarily.
I suspect that writing to the SCU_CLKCNTR register is affecting the other clocks. Is this true? Is there another workaround I can use?
-Dave
