Boundary Scan and EXTEST

[janis2]

Posted on November 23, 2009 at 18:10

Boundary Scan and EXTEST

[janis2]

Posted on May 17, 2011 at 13:31

Hello!

I am testing JTAG boundary scan for LQFP100 STM32F103VC with DEVICEID 06414041 and 3BA00477. There is no bsdl file for this particular deviceid, so I am using bsdl file STM32F103VBT.bsd with updated names and deviceid. I noticed that STM32F103V8T.bsd is the same as STM32F103VBT.bsd and only names differ so I assume that bsdl for STM32F103VCT should be the same as well. Instructions BYPASS and IDCODE works. Also by using PRELOAD an EXTEST I can toggle pin outputs. Though when using EXTEST and pin inputs they do not match with bsdl specification. It is very strange because output and control bits match with bsdl. I have not figured out correlation yet. For example: If I externally pull pin 53(PB14) to gnd and +3.3 then bit 151(PB2) and only this bit gets toggled. Same happens for pin 36(PB1) and bit 217(PE6), pin 51(PB12) and bit 157(PB0), pin 54(PB15) and bit 148(PE7). I have reproduced this with J-Link-ARM and TopJTAG Probe as well as Olimex JTAG-ARM and OpenOCD with manual svf instructions. Any help would be greatly appreciated. Regards, Janis Putrams

[16-32micros]

Posted on May 17, 2011 at 13:31

Dear Janis,

Here you go, We are planning to publish on web BDSL files for our new recent micro-controllers including Connectivity line. The behavior you are observing is normal, The high-density BSDL for LQFP100 pins are not the same as their Medium density cousin 🙂 Neither their little brother 🙂 ( Low density devices) Cheers, STOne-32.

[janis2]

Posted on May 17, 2011 at 13:31

Thank you very much. Works smoothly now 🙂