STM32F42xx errata - FMC Corruption ... really?

John F. · ‎2014-03-27

Posted on March 27, 2014 at 11:19

The STM32F42xx and STM32F43xx Errata DocID023833 Rev 6 Para 2.8.4 says, there may be Corruption of data read from the FMC under some circumstances.

''When the FMC is used as stack, heap or variable data, an interrupt occurring during a CPU

read access to the FMC may results in read data corruption or hard fault exception. This

problem does not occur when read accesses are performed by another master or when

FMC accesses are done when the interrupts are disabled.''

The workarounds are to use only DMA to read access the FMC or only read it when interrupts are disabled.

Is this right? A real-time microcontroller must have

all interrupts disabled

in order to safely read memory on the FMC? Have I misunderstood?

I was planning to use an STM32F429 with SDRAM. Now I'm worried. Anybody else noticed this?

Amel NASRI · ‎2014-03-27

Posted on March 27, 2014 at 15:20

Don't worry John; this limitation is only on Revision A and already fixed on Revisions Y & 1.

Please note that Rev A devices were the first samples and were not in production. Now, the only available devices are Rev Y & Rev 1.

In the table 4 (Summary of silicon limitations) on the same document, you can have an overview of all limitations & there status, including the one in section 2.8.4.

-Mayla-

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John F. · ‎2014-03-27

Posted on March 27, 2014 at 17:08

Hi Mayla,

Thanks, I should have checked the revisions but was so shocked by the idea of a microcontroller that had to disable interrupts to work, I fired off my question straight away!

I've worked with the STM32 since the first STM32F1xx and although I know there are niggles I am very impressed with the family.

John F.