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STM32L0xx peripheral setting state after STOP mode

Posted on December 29, 2015 at 11:53

I am going to use STM32L052 in Stop mode with waking up by both RTC WakeUp Counter and EXTI GPIO.

I am not sure about standard peripherals (ADC, SPI, I2C, USART):

1.  Are they switched off by entering Stop mode automatically as their clock domain is switched off in Stop Mode? Or should I switch them off by another way not to consum power?

2. Do they keep their settings during Stop mode or do I have to repeat all settings as they run at the program start (i.e. MX_ADC_Init(), MX_I2C1_Init() etc.)?

However, I know that all clocks including these for peripherals must be set again after Stop mode.

Thank for information.

Ivan

#stm32l0xx-stop-mode
2 REPLIES 2
Nesrine M_O
Lead II
Posted on December 29, 2015 at 16:02

Hi Ivan,

I recommend you to have a look to the Low-power modes paragraph in your related STM32L0xx reference manual and the

http://www.st.com/web/en/resource/technical/document/application_note/DM00108286.pdf

application note.

Also I recommend you to try the PWR examples under the STM32Cube L0 firmware package.

-Syrine-

Posted on December 29, 2015 at 19:19

Thank you for quick response.

I read STM32L0xx ultra-low power features overview before but there is nothing about the peripheral setting volatility.

I studied the PWR_STOP_RTC example from STM32CubeL0/Projects before but there is not any peripheral used there.

Regarding the datasheet, I have found

''6.3.9 Stop mode

 

The Stop mode is based on the Cortex®-M0+ deepsleep mode combined with peripheral

 

clock gating.''

But it is not clear whether the clock is stopped automatically.

Also

'' 6.3.3 Peripheral clock gating

 

...

 

Disabling the peripherals clocks in Sleep mode can be performed automatically by resetting the corresponding bit in RCC_AHBLPENR and RCC_APBxLPENR registers (x can 1 or 2).''

But it is not clear whether it stands for Stop mode, too.

''The ADC, DAC can also consume power in Stop mode, unless they are disabled before

 

entering it. To disable them, the ADON bit in the ADC_CR2 register and the ENx bit in the DAC_CR register must both be written to 0.''

So I understand that ADC must be switched off explicitly.

However, there is nothing about other peripherals so gating clock off may be sufficient?

I have not found in the datasheet anything about the peripherals setting volatility.

Ivan