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Instruction clocks

greg_t
Associate II
Posted on September 23, 2010 at 17:18

Instruction clocks

2 REPLIES 2
Posted on May 17, 2011 at 14:08

How many clocks needed for one instruction ?

Depends : It's harder to do static analysis than in 1980, because there are far more complex interactions going on internally with a SoC design.

It is usually one, but your execution speed is going to depend on how the flash prefetch works (because the flash is slow, probably ~30-35ns access time, and the buffering mechanism assumes linear code flow) whereas the ram is single cycle.

Your load/store instructions are going to depend on the bus speed of the source/destination, be it multiple wait states on the flash, or slower peripheral buses. Or if others are using the bus.

Want to benchmark code, uses the DWT_CYCCNT cycle counter in the trace/debug unit.

Editing apparently alters the post ordering.

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lipin
Associate II
Posted on May 17, 2011 at 14:08

clive1 is real expert in here. Anyway I will post some useful links about instructions and cyccnt:

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0337g/BABEACEG.html

http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0337g/BABJFFGJ.html

Regards

Thomas