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TIM2 interrupt problem

madhu13
Associate II
Posted on August 18, 2010 at 10:09

TIM2 interrupt problem

#interrupt

5 REPLIES 5
stforum2
Associate II
Posted on May 17, 2011 at 14:03

Seems to be OK.  Of course line  'RCC->APB2ENR='  is an error.

(1 << (TIM2_IRQChannel & 0x1F)); should evaluate to 0X10000000.  Does it?

Is the address of TIM2_IRQhandler in the approrpiate vector location?

madhu13
Associate II
Posted on May 17, 2011 at 14:03

hi,

thank you for the response, i am not able to understand this NVIC->ISER[0] configuration, can you please explain me in detail i wrote same program for TIM1 that worked well.

stforum2
Associate II
Posted on May 17, 2011 at 14:03

The NVIC is the Nested Vectored Interrupt Controller and it is part of the Cortex-M3 core.

To enable an interrupt in the Cortex-M3 core, a bit in one of the the NVIC's SETENEABLE registers must be set.

In the case of timer 2 on an STM32 chip, bit 28 of register SETENABLE0_31 must be set.

I presume that NVIC->ISER[0] is this SETENABLE0_31 register.  (We don't know for sure because we don't use your compiler.)

In this case, the 0X1F mask does nothing since TIM2_IRQChannel is (or should be) 28.

(1 << (TIM2_IRQChannel & 0x1F))

is therefore the same as

(1 << TIM2_IRQChannel)

The 0X1F mask is only required for channels that are greater than 31.

If it is of interest, you can obtain the development tools that we use from here:

http://www.crossware.com/trialware/21499113stm/index.htm

You can use wizards to create all of the code you require and you can test it in the simulator before you run it on the hardware.

madhu13
Associate II
Posted on May 17, 2011 at 14:03

i have enabled the 28th bit of ISER[0) reg but still i interrupt is not comming.........

madhu13
Associate II
Posted on May 17, 2011 at 14:03

I came to what was the problem its in the interrupt subroutine name ie. void Void TIM2_IRQhandler(void) which should be Void  TIM2_IRQHandler(void) . now code is working fine thank you...