Tim1 Channel 4 Porblem

ezrab · ‎2011-06-26

Posted on June 27, 2011 at 08:32

hi.

i am tring to activate 3 chanel as ''6-step PWM generation'' with Dead time and afourth channel as stady 50% duty cycle .

for some reason when i activate the Fourth Channel it disraps the other three.

why?

here is the code:

TIM1->ARR=1600; /* Set the Autoreload Register value (Count/f)=(1/(wanted freq))*/

TIM1->EGR=TIM_EGR_UG;/*!<Update Generation */

//channel 1 PA8 PB13

TIM1->CR2=TIM_CR2_OIS1 ; /*!<Output Idle state 2 (OC2 output) */

TIM1->CCMR1=TIM_CCMR1_OC1M ; /*!<OC1M[2:0] bits (Output Compare 1 Mode) */

TIM1->CCR1=800; /* Set the Capture Compare1 Register value (Duty Cycle)*/

TIM1->CCER=TIM_CCER_CC1E |TIM_CCER_CC1NE | TIM_CCER_CC1P | TIM_CCER_CC1NP ; /*!<Capture/Compare 1 output enable */

//channel 2 PA9 PB14

TIM1->CR2|=TIM_CR2_OIS2 ; /*!<Output Idle state 2 (OC2 output) */

TIM1->CCMR1|=TIM_CCMR1_OC2M ; /*!<OC1M[2:0] bits (Output Compare 1 Mode) */

TIM1->CCR2=800; /* Set the Capture Compare1 Register value (Duty Cycle)*/

TIM1->CCER|=TIM_CCER_CC2E |TIM_CCER_CC2NE | TIM_CCER_CC2P | TIM_CCER_CC2NP ; /*!<Capture/Compare 1 output enable */

TIM1->CR2|=TIM_CR2_OIS3 ; /*!<Output Idle state 2 (OC2 output) */

TIM1->CCMR2|=TIM_CCMR2_OC3M ; /*!<OC1M[2:0] bits (Output Compare 1 Mode) */

TIM1->CCR3=800; /* Set the Capture Compare1 Register value (Duty Cycle)*/

TIM1->CCER|=TIM_CCER_CC3E |TIM_CCER_CC3NE | TIM_CCER_CC3P | TIM_CCER_CC3NP ; /*!<Capture/Compare 1 output enable */

TIM1->CR2|=TIM_CR2_OIS4 ; /*!<Output Idle state 2 (OC2 output) */

TIM1->CCMR2|=TIM_CCMR2_OC4M ; /*!<OC1M[2:0] bits (Output Compare 1 Mode) */

TIM1->CCR4=800; /* Set the Capture Compare1 Register value (Duty Cycle)*/

TIM1->CCER|=TIM_CCER_CC4E | TIM_CCER_CC4P ; /*!<Capture/Compare 1 output enable */

TIM1->CCMR1|=TIM_CCMR1_OC1PE ; /*!<Output Compare 1 Preload enable */

TIM1->CR1=TIM_CR1_ARPE; /*!<Auto-reload preload enable */

TIM1->CR1=TIM_CR1_CEN; /*!<Counter enable */

TIM1->BDTR=TIM_BDTR_MOE;

thanks for your help.