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STM32F1x SPI can't reset/re-sync after a data error

terrywrose
Associate
Posted on April 19, 2013 at 16:34

I have been looking at using the SPI peripheral on an STM32F103VET6 MCU.

I am intending to use SPI to network 3 MCU's on a single PCB as I need to support 12 duplex high speed USARTS for a large RS485 project.

I ran the example master slave tests supplied with the STM32 Lib and have found that there is a problem with one of the examples which prompted me to do further tests on a looping SPI master - slave test.

The problem with the ST LIB example was that it would only work after being downloaded by JTAG debugger AFTER an MCU reset. If it was just run after being down load then the first bit of the transfered master to slave SPI byte was always dropped.

I changed the LIB example code to enable CRC on a master SPI and slave SPI and send a 32 byte buffer from master to slave. (Both master and slave are on the same device as this is just a test, to find out why the slave SPI goes out of sync with the master after an error).

When I induce a noise spike on the data and clock lines (via mains tranformer located close to the MOSI and SCK connecting jumper wires) the MCU does what it should do, that is flag that there has been a CRC error (also sometimes an OVR) as the data is corrupted.

The problem I have is that I can't get the slave SPI to reset it's self after the error. The symptom is that once the clock or data line has been corrupted by a noise spike the SPI slave will no longer transfer any data correctly (it seems to stay out of sync with the master clock/data). The master still sends the correct data and CRC after the Slave has flagged the CRC error and has tried to re-start receiving a new data packet.

I have tried to disable/reenable the slave SPI, reinit the slave SPI disable/reenable the slave CRC, disable renable RCC clocks etc. but nothing I do in my error routine allows me to get the slave SPI perhipheral that had the data error back into a state where it will corrctly recive data from the master SPI again. The only thing that seems to work is to reset the MCU, which is of no use on a multi process system.

I have read the STM32 tech manual on the SPI and followed all the guidlines but there does not seem to be a way to reset the SPI periheral after an SPI data error.

I have also looked at the web but can only see problems where a user was not following the correct setup or send timming for the SPI. There seems nothing about handling the SPI after it has received an error.

Has anyone found a way to re-sycronise/reset the SPI peripheral after a data error has occured?

Thanks for reading this,

Terry Rose
2 REPLIES 2
Posted on April 19, 2013 at 16:57

What is ''reinit''?

Wouldn't resetting it through the respective RCC reset register help?

JW

terrywrose
Associate
Posted on April 19, 2013 at 17:25

Hi Jan,

I just found the problem with my code I was not resetting the CRC error flag in the status (SR) register (reading the SR does not seem to reset it like the other bits) it stays set through all the init's etc. My fault as there is a ''special get crc error flag'' routine in the LIB.

I will try to delete this post, however the ST sample SPI example code does have a bug but I have no time to check that out as I'm behind due to this silly mistake.

T