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SDADC full scale

bpacan
Associate II
Posted on May 17, 2013 at 10:09

Hi

We are using STM32F373 for the first time in our units and a problem with SDADC full scale occurred. We use it in a simple resistor measurement circuit:

0690X00000602obQAA.jpg

Circuit compares Rx with a know Rref resistor. Controller is supplied with 3V3, max. Vref (when Rx open) is 2.5V, all grounds together, external reference. Followers separate analog circuit from controller.

What we found is SDADC output value is max. (0xFFFF) even if channel voltage is still below reference voltage e.g. 2.475V on channel, 2.492V on Vref. So we can't use full scale, which is very important in this configuration. Lower voltages are ~ok.

What we tested up to now:

- different buffers (with input bias current <2nA typ.), single supply

- with/without SDADC calibration

- 2V5 -> 2V0

- different gains, channels, SDADCx, single channel/multiple channels (we use 😎

- voltage on all pins with multimeter (err 0.1%) and scopes - all 'pure' DC, no HF

The only setting which helped a little bit is gain=0.5. We can measure in full scale (channel from 0 to Vref) but then we loose one bit (15bit left, I think we could live without it) and values are 0...~33712 (> 32768) (this is not good).

My question is have You seen similar behaviour on Your boards or have You any tips what else can we check.

Second question is about SDADC calibration. Automatic sets bits SDADC CONF0R OFFSET0 to ~0x5A0. We tried set it manually, but it seems it's not a linear function of measurement offset (e.g. OFFSET0 = 0..1..2 gives values 0..2..1). What is exactly meaning of CONFOR0 OFFSET bits?
6 REPLIES 6
raptorhal2
Lead
Posted on May 18, 2013 at 16:30

Compare your results with the gain error in the datasheet Table 74. But your error is positive, while the datasheet specifies a negative error. Perhaps someone else can provide an explanation.

Is your 2.5V supply stable enough to allow using the internal SDADC reference voltage instead ? Then you wouldn't be trying to convert near the reference voltage.

Cheers, Hal

bpacan
Associate II
Posted on May 20, 2013 at 11:15

Thanks for Your response.

I checked error tables in datasheet. I see max. value (0x7FFF) @ gain=0.5 about 60mV below Vref in our board, which gives error of 2.4%. Datasheet specify gain error min. -2.4%, max. -3.1%. So it seems everything is within datasheet limits (except +/- ?).

I'm not sure if I get Your second idea.

We use this circuit with Rref to measure resistances in wide range (2ohm - 500kohm). The advantage is calculated Rx is not a function of any supply voltage, only a function of Rref and ADC/ADCmax. We don't want to change a circuit to a one with constant V or I because of problems with its stability in time and temperature.

raptorhal2
Lead
Posted on May 20, 2013 at 15:29

Apparently the 2.5V supply is not stable enough for your application.

Try using differential inputs, where one reading is the difference across Rref, and the other is the difference across Rx.

Cheers, Hal

bpacan
Associate II
Posted on May 21, 2013 at 12:08

I think You didn't understood my simplified schematic.

The current source is powered from 2V5, which means the max. value on Vref is about 2V5 (when Rx->Mohms). But if Rx>0ohm, Vref is about 1V3 (because of I1 resistance), Vchannel is 0V in this situation. 2V5 value and stability has no influence on the measurement (we tested 2V...3V with no software changes, get the same results).

Differential inputs are perhaps possible with this circuit, but as I wrote, we use 8 channels and have only 3 pins left. Also datasheet table 74 specify the same min. gain error for differential mode.

raptorhal2
Lead
Posted on May 22, 2013 at 17:13

The differential mode has less offset, which will help with errors.

The SDADC is a new peripheral, so forum participants experience is slim. I have ordered an STM32F373 processor to experiment with, but it will be 2 weeks or so before it is up and running. If your issue is not solved by then, post your code.

Cheers, Hal

bpacan
Associate II
Posted on May 23, 2013 at 10:32

The latest solution described below is ok for us, temperature and time stability of error is good. The only problem is a differences between processors (we tested 4pcs).

We decided to change gain back to 1 (to have all 16 bits working), leave common mode zero referenced and change opamp followers into K=0.9 amps. This will give results of almost full scale. We'll make calibration on high level of application during manufacturing of our boards. The calibration will handle with opamps errors and also SDADC gain error.

I think this task is solved. Thanks for answers.