2011-03-09 07:37 PM
Does ST-Link support 1.8V target JTAG I/O?
2011-05-17 05:27 AM
Hi,
In the ST Link user manual it is mentioned that, ''JTAG/SWD specific features: – 3 V to 3.6 V application voltage supported on JTAG/SWD interface and 5 V tolerant inputs''2011-05-17 05:27 AM
The absence of a RESET typically assumes you have a human on-hand to cycle the big red switch when required.
2011-05-17 05:27 AM
Yes, I read that ''3V to 3.6V'' business in the documentation too. But if so it begs the question.... what is ST's intention on doing JTAG with their new 1.8V processors? Do I have to build a level-converter board to sit between their processor and their JTAG programmer? Seems pretty cumbersome, particularly when it's implied that their programmer can already deal with 1.65V signaling.
2011-05-17 05:27 AM
Hard to say, but this is why we see a lot of different JTAG pods, like for example the ULINK2 vs ULINK-ME, the latter being a small lower cost device WITHOUT voltage translation circuits, and the flexibility in core voltages those permit.
For example the J-LINK's use a ALVC164245 part. http://ics.nxp.com/support/techtips/levelshift/ One could make one's own interposer, use other more flexible JTAG pods, or wait for ST to deliver a lower voltage ST-LINK. I would suspect ST and other ARM developers use more professional/flexible/cross-platform JTAG pods in general, rather than the ST-LINK. You might want to check for F2xx support in the ST-LINK. Personally I expect them to release an ''F2 Discovery'' type board at some point, and we can jump on that.