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APB1|2 Peripheral Reset Registers

geoffreymbrown
Associate II
Posted on April 04, 2012 at 15:44

The reference manuals don't really define what these registers do (at least RM0041).   I assume that toggling one of these bits resets the corresponding peripheral to its initial state.  That seems to be confirmed by the standard firmware library Deinit functions.   Nevertheless, it would be nice to have a clear definition.   Do these bits also disable the clock to the corresponding peripheral ?  Is there documentation somebody could point me to ?  

1 REPLY 1
Posted on April 04, 2012 at 16:43

The clocks are gated separately, the reset clears, or sets, the synchronous latching elements (flip-flops, counters, registers, etc) to default conditions.

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