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Clock configuration tool for STM32F429/439 ?

root
Associate II
Posted on October 20, 2013 at 22:19

Hello,

Is this tool already available for 429/439 series STM32 ?

If it is, where can I find it ?

Thomas.
9 REPLIES 9
Posted on October 20, 2013 at 22:39

I'm not sure I've seen one, the clocking scheme is pretty similar with just the addition of the LCD tap, and SAI PLL. There is also the over-drive regulator mode.

I generally just edit the system_stm32fxxx.c files, or write a quick fitter app

Do you have an area of specific concern?
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root
Associate II
Posted on October 21, 2013 at 17:34

Hello,

No specific concern, I'm just used to it 😉

Is there a template for the system_stm32fxxx.c for this serie of STM32 (I'll take a look in the standard peripheral library) ?

Thomas.

Posted on October 21, 2013 at 17:47

Is there a template for the system_stm32fxxx.c for this serie of STM32 (I'll take a look in the standard peripheral library) ?

 

Unfortunately there appear to be several, both in the StdPeriph and STM32F429-Discovery releases, with some multiple instances spread around in the example directories for good measure.

The Discovery one was a bit less cluttered up, but the SDRAM init code was either missing, or wrong (for the 4x9I EVAL board). I've posted a fix for that if it helps.

There is a seminar tour in November, if a clock tool or firmware release doesn't show up in the mean time, I'll poke someone there.
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infoinfo991
Associate III
Posted on February 01, 2014 at 23:26

Hi

I'm looking for the exact same thing.

I've visited the seminar already, I even have my own custom PCB made and ready to start working on the firmware. I need to generate the clock file for 180 MHz system clock from a 16 MHz crystal with 48 MHz for USB.

Very frustrating, and the workbook is password protected so I can't even manually edit the macros

ST, please provide an updated file

Posted on February 01, 2014 at 23:33

At 180 MHz I've got no idea how you're going to manifest a 48 MHz USB clock. The only way I see USB working on a 180 MHz clock is if you use an external PHY.

Saw a lot of slides, and never really got a handle on how this was supposed to happen.
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Posted on February 01, 2014 at 23:40

I've push the thread into moderation asking for a technical response.

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Posted on February 02, 2014 at 01:54

Idly wonder to myself if the reduced geometry part has a VCO capable of 720 MHz......

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Posted on February 02, 2014 at 02:59

Looks promising,

#if 1 // fVCO=720 MHz fCOMP=1.6 MHz sourcer32@gmail.com

/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */

#if defined (PLL_SOURCE_HSI)

#define PLL_M 10

#else

#define PLL_M 5

#endif

#define PLL_N 450

/* SYSCLK = PLL_VCO / PLL_P */

#define PLL_P 4

/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */

#define PLL_Q 15 #endif

#if 0 // fVCO=720 MHz fCOMP=2.0 MHz

/* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLL_M) * PLL_N */

#if defined (PLL_SOURCE_HSI)

#define PLL_M 8

#else

#define PLL_M 4

#endif

#define PLL_N 360

/* SYSCLK = PLL_VCO / PLL_P */

#define PLL_P 4

/* USB OTG FS, SDIO and RNG Clock = PLL_VCO / PLLQ */

#define PLL_Q 15

#endif

..

#if defined (PLL_SOURCE_HSI)

uint32_t SystemCoreClock = ((HSI_VALUE / PLL_M) * PLL_N) / PLL_P;

uint32_t USBSDIORNGClock = ((HSI_VALUE / PLL_M) * PLL_N) / PLL_Q;

#else

uint32_t SystemCoreClock = ((HSE_VALUE / PLL_M) * PLL_N) / PLL_P;

uint32_t USBSDIORNGClock = ((HSE_VALUE / PLL_M) * PLL_N) / PLL_Q;

#endif

Half suspect it should be able to push 800 MHz (got decade old silicon that can do 600 MHz), but someone from ST will need to validate the max speed, because it's still quoted at 432 MHz per the larger geometry part.

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infoinfo991
Associate III
Posted on February 02, 2014 at 23:03

My HSE is 16MHz, so I am trying to use the following

PLL_M = 8

PLL_N = 360

PLL_P = 4

PLL_Q = 15

It worked, my USB device enumerated, and J-Link's frequency measurement read about 180MHz

Thanks for the help