Posted on January 08, 2018 at 14:26Hi,
My H7 application uses ethernet and QSPI. The RAM region is AXI SRAM (0x24000000), when the destination pointer of the QSPI DMA is in AXI SRAM sometimes the memory reads correctly and sometimes not. So a create a destination buffer fixed at the address 0x20000000, Now the memory always reads correctly.
I don't now if it is a problem of cache coherency or a issue of the 2.2.15 errata.
How to configure the MPU to avoid cache coherency in the AXI SRAM and how to apply the errata 2.2.15 workaround in software?
ARi.
