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Changing STM32 sysclk in run mode

hitsumen
Associate II
Posted on October 23, 2014 at 19:20

Good day,

Is it possible to change system clock (PLL) during run mode.

I tried to change it with this one, but does not worked:

RCC->PLLCFGR = PLL_M | (PLL_N << 6) | (((PLL_P >> 1) -1) << 16) |

                   (RCC_PLLCFGR_PLLSRC_HSE) | (PLL_Q << 24);

Still have same:

SYSCLK_Frequency: 84000000 //cannot change it 

HCLK_Frequency  : 84000000 //I can change it

//RCC_HCLKConfig(RCC_SYSCLK_Div2);

PCLK1_Frequency : 42000000 //I can change it

//RCC_PCLK1Config(RCC_HCLK_Div2);

PCLK2_Frequency : 84000000 //I can change it

//RCC_PCLK2Config(RCC_HCLK_Div1);

In some tasks I need my 84 MHz, for some tasks I do not need to have so much power, should be good to lower my CPU speed to save some energy.

Or there are some more ways to save some energy?

2 REPLIES 2
Posted on October 23, 2014 at 19:22

Pretty sure you're precluded from changing the PLL when it's running

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Posted on October 24, 2014 at 10:28

> Pretty sure you're precluded from changing the PLL when it's running...

... as the fine manuals are absolutely clear in this. For example, RM0033 (and this is named probably the same in all other RMs, too), chapter ''PLL configuration'': ''Since the main-PLL configuration parameters cannot be changed once PLL is enabled,[...]''. Also in the descripiton of PLLP/PLLN/PLLM fields in RCC_PLLCFGR: ''These bits can be written only if PLL is disabled.''

Now, you can't disable PLL while PLL is used as system clock (again, this is very clearly written in many places in the RM, I hope I don't need to quote at this place again). So, you need to:

- switch the system clock to a different clock (HSI, HSE, provided they are running - the one used as PLL source is surely running at this moment, the other needs to be checked and if not running, started/wait until up)

- stop PLL, wait until down

- change PLL params; if needed, change FLASH params and/or APB prescalers

- start PLL, wait until up

- switch system clock to PLL, wait until switched

- if other than PLL-source clock was used as the temporary system clock, it can be shut down now

 

JW