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STM32F411/RM0383 bad RCC_AHB1LPENR reset value

Uwe Bonnes
Principal II
Posted on January 31, 2017 at 17:20

6.3.13 RCC AHB1 peripheral clock enable in low power mode register

(RCC_AHB1LPENR)

Address offset: 0x50

Reset value: 0x0061 900F

(gdb) p /x RCC->AHB1LPENR

$6 = 0x61909f

The RM0383 misses GPIOe/H

1 REPLY 1
Khouloud GARSI
Lead II
Posted on January 31, 2017 at 18:31

Hi

Bonnes.Uwe

,

Again, thanks a lot for yourinteresting contributions .

The highlighted reset value will be corrected in the coming version of the reference manual.

Khouloud.