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STM32H743 ADC Common mode input voltage specification

Uwe Bonnes
Principal II
Posted on October 17, 2017 at 19:28

Hello,

ds12110 rev 2 for the STM32H743 tells in table 84 for V(CMIV) a low limit of  VREF/2-10% and a high limit of  VREF/2 +10%.  This would mean e.g. with Vref = 3 Volt that a measurement with ADCIN+ pin at 0.5 Volt and ADCIN- pin at 1 Volt would be out of specified range. In the example V(CMIV) = (ADCIN+ + ADCIN-) / 2 = 0.75 Volt is far off the 10 % range around VREF/2 = 1.5 Volt. Usability of the ADC in differental mode would be substantial hampered.

Do I missunderstand V(CMIV)? Or is the datasheet wrong? Or does the H7 ADC really have that hard requirements for V(CMIV)?

1 REPLY 1
Ats
Associate II

Hi! I think It is perfectly normal for true differential application as the input signal's cmmv will stay very close to Vref cm (Vref/2 in this case). Other MCs with differential ADC have this limitation too.

TI, for example have only +-50mV cmmv range.

This will be a problem only in pseudodifferential application.