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STM32F2xx SPI DMA FIFO error

jpeacock2399
Associate II
Posted on September 25, 2012 at 00:36

When I use DMA on the transmit SPI2 chanel (STM32F205) I consistently get FIFO errors at the end of the transfer, even though the FIFO is disabled.  I verified the DMDIS flag is 0 in the DMA_SxFCR register but the DMA_HISR register still shows FEIF4 flag set.  DMA stream 4 is configured as a dummy SPI clock, no memory or peripheral increment.  Memory and peripheral burst is set to singular (byte).  FIFO is disabled, threshold set to 1/4.

From what I read in the reference manual it should not be possible to get a FIFO error if the FIFO is disabled, yet it still happens.  It doesn't affect transfers but is a mystery.  Has anyone encountered the same situation?

  Jack Peacock

#spi-dma-fifo
4 REPLIES 4
mario23
Associate
Posted on May 13, 2014 at 16:08

Dear Jack,

Have you ever found a solution to this? I'm have the exact same scenario / behaviour as you, but on a STM32F207.

Mario

Amel NASRI
ST Employee
Posted on June 11, 2014 at 15:30

Hi Mario,

Are you enabling the used peripheral before the corresponding DMA stream? If it is the case, a ''FEIF'' may be set. (please refer to AN4031/p32: Using the STM32F2 and STM32F4 DMA controller for more details).

-Mayla-

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jpeacock2399
Associate II
Posted on June 11, 2014 at 15:55

What the reference manual doesn't make clear is the FIFO error is also triggered by falling below the FIFO threshold.

  Jack Peacock