Reference manual RM0090 (STM32F407xx) contains wrong register maps (OTG HS, OTG FS)

christiancier9 · ‎2012-08-10

Posted on August 10, 2012 at 09:48

Hello ST documentation team!

I would like to report two issues for the USB OTG HS and OTG FS cores which I found in the current documentation (Doc ID 018909 Rev1) . Page 1014 (OTG_FS register map): * OTG_FS_GUSBCFG The PHYSEL bit is bit 6 and _not_ bit 7! Page 1155 (OTG_HS register map): * OTG_HS_GUSBCFG The PHYSEL bit is not mentioned here at all. It is marked ''reserved'', although it is essential to use this bit to get the embedded phy of the OTG HS core running. It is also bit 6 here which has to be used. These issues were found while studying the ST USB libs in detail. If you look in STM32_USB_OTG_Driver\inc\usb_regs.h you will find the following struct:

typedef union _USB_OTG_GUSBCFG_TypeDef 
{
uint32_t d32;
struct
{
uint32_t toutcal :
3;
uint32_t Reserved3_5 :
3;
uint32_t physel :
1;
uint32_t Reserved7 :
1;
uint32_t srpcap :
1;
 [...]

As you can see the ST USB OTG libs use the PHYSEL on bit 6. The ST USB OTG libs are working without any problem. Please also do not forget do update the corresponding detailed register descriptions. Thanks! #usb-otg-hs-physel-rm0090

i51211314 · ‎2012-08-10

Posted on August 11, 2012 at 05:42

Yes, i found this 'bug' even when i first use their STM32F207 chips!!! I can't understand why ST 'always' make their bugs from one products line to next without correct them!! You always can found so many 'limitations' in their chips (see their Errata sheets). When i use NXP's chips, the errata sheets only several pages.

i51211314 · ‎2012-08-10

Posted on August 11, 2012 at 05:49

ccier, please check ''STM32_USB_OTG_Driver\inc\usb_regs.h''

in:

''struct _USB_OTG_DREGS'', the line:

''uint32_t Reserved40; /* dedicated EP mask 840h*/''

Is it right? You can have a look at the comments, two '844h'????

flyer31 · ‎2012-08-14

Posted on August 14, 2012 at 14:15

But hopefully they are improving recently. There is a new ''Cortex M4 programming manual'' available now for download, which from the first sight looks VERY nice and helpful. (without this manual it sometimes was really very nasty to figure out the differences between the Cortex-internals and the ST peripherals ...).

Also the new errata sheet and the application note AN4073 to improve ADC accuracy looks very helpful (except that I miss a clear indication of the speed loss, if I switch off the prefetch).

So possibly in some near future they might also present an updated reference manual. (and possibly also an updated USB lib (where USB-HS core might be working in FS mode then also ...) ... these are the 2 worst things currently on their STM32F4 documentation / support pages - seen from my point).

btvnlue · ‎2012-12-23

Posted on December 24, 2012 at 06:59

I noticed same issue for stm32f107vc

In reference book,

Bit 7PHYSEL: Full Speed serial transceiver select

This bit is always 1 with write-only access.

but ST Lib defined gusbcfg

typedef union _USB_OTG_GUSBCFG_TypeDef

{

uint32_t d32;

struct

{

uint32_t toutcal :

3;

uint32_t Reserved3_5 :

3;

uint32_t physel : /* MUST be always 1 because the phy is embedded*/

1;

uint32_t Reserved7 :

1;

uint32_t srpcap :

1;

uint32_t hnpcap :

1;

uint32_t usbtrdtim :

4;

uint32_t reserved15_30 :

15;

uint32_t force_host :

1;

uint32_t force_dev :

1;

uint32_t corrupt_tx :

1;

}

b;

} USB_OTG_GUSBCFG_TypeDef;