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RCC_CFGR_HRPE Bit? (SysClk Devider)

flyer31
Senior
Posted on March 28, 2013 at 10:12

Hi,

in the file System_ST32F4xx.c of the ST4Discovery examples, I always find the following 2 lines for the clock configuration (SysClk 168MHz):

    /* HCLK = SYSCLK / 1*/

    RCC->CFGR |= RCC_CFGR_HPRE_DIV1;

      

    /* PCLK2 = HCLK / 2*/

    RCC->CFGR |= RCC_CFGR_PPRE2_DIV2;

    

    /* PCLK1 = HCLK / 4*/

    RCC->CFGR |= RCC_CFGR_PPRE1_DIV4;

I understand the meaning for the last 4 lines - here SysClk must be devided by 2 or 4, resp., as the APB1 and APB2 frequencies are limited to 84MHz and 42MHz.

But concerning the first 2 lines, here the RM 6.3.3(RCC_CFGR) states:

Bits 7:4 HPRE: AHB prescaler

Set and cleared by software to control AHB clock division factor. ...

0xxx: system clock not divided

1000: system clock divided by 2

...

So according to this register description, RCC_CFGR_HRPE could be left on its init value of 0. Why is it programmed to the value ''2'' in the ST4Discovery examples? Anyone has any idea?

3 REPLIES 3
Posted on March 28, 2013 at 12:25

I'd guess that they are autogenerated or simply product of copy/paste. Take it as a template for your code where you might potentially want to use a different divider.

> Why is it programmed to the value ''2'' in the ST4Discovery examples?

In my copy of stm32f4xx.h:

#define  RCC_CFGR_HPRE_DIV1                  ((uint32_t)0x00000000)        /*!< SYSCLK not divided */

Where do you have ''2'' from?

JW

flyer31
Senior
Posted on March 28, 2013 at 16:30

Thank you for your answer.

The command

RCC->CFGR |= RCC_CFGR_HPRE_DIV1

puts HPRE to ''2'' (as DIV1 is the 2nd bit in this HPRE field).

Posted on March 28, 2013 at 16:52

No. The C compiler doesn't know about what is written in reference manual.

Check how 

RCC_CFGR_HPRE_DIV1

is defined in the library files you are including/linking. Chances are, that it's a macro defined as I described above.

JW

[EDIT] Oh, I now see what's the source of your confusion:

#define  RCC_CFGR_HPRE_1                     ((uint32_t)0x00000020)        /*!< Bit 1 */

versus

#define  RCC_CFGR_HPRE_DIV1                  ((uint32_t)0x00000000)        /*!< SYSCLK not divided */

Oдна буква и кака�? разница... 😉

JW