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GPIO Speed setting Fast/High (50/100MHz) - IO Compensation cell

flyer31
Senior
Posted on January 27, 2012 at 10:28

Hi,

in the reference manual RM0090 for STMF4, in chapter 7.1 it is recommended to activate the ''IO compensation cell'' (Register SYSCFG_CMPCR), if outputs are used with speed settings of 50 or 100 MHz (GPIOx_OSPEEDR-Register).

If I search for ''SYSCFG_CMPCR'' in the folder STM32F2xx_StdPeriph_Lib_V1.0.0\Libraries, then I get a hit in the file stm32f2xx_syscfg.c, there is a function named ''SYSCFG_CompensationCellCmd'', and in the release notes, they specify that this command was added in April 2011 only. But if I search the source folder for the usage of this command, it is never used.

Anyone who has experience with the influence of this ''IO compensation cell''? Is it really a good a advise to use it?

Further: In the reference manual 6.4.3, description of register GPIOx_SPEEDR, it says for hi-speed setting: 100 MHz High Speed on 30pF (80 MHz Output max speed on 15pF). Is this real or maybe some misprint? (for higher capacitive pin load I definitely would expect some lower speed ...). (??)

2 REPLIES 2
shannon2
Associate II
Posted on January 28, 2012 at 22:27

Perhaps if you described the problem you are having we could help you.  Have you looked at the signals on an o'scope?

flyer31
Senior
Posted on January 28, 2012 at 23:17

Yes, I looked at the signals with a 100MHz oscilloscope (50MHz Timer outputs).

After I included some master-slave relationships between the timers (to synchronize them), I recognized that there is a phase shift between the timers, if I switch on this compensation cell. So I anyway think, I cannot use this.

I was just curious, whether I should see some other influence due to this compensation cell setting, because I did not see any influence on the pulse form. (But today I recognized, that it might be necessary, to switch on the SYSCFG clock source first - which I did not do yesterday on my first testing).

No problems - just curiosity.