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STM32F101 or 103

daryl1
Associate II
Posted on August 05, 2008 at 05:15

STM32F101 or 103

3 REPLIES 3
daryl1
Associate II
Posted on May 17, 2011 at 12:41

Dear all,

I am looking for a STM32F101 or 103 with the following criteria:

LFBGA package

>32KB internal SRAM

>256K internal flash

Flexibal static memory interface (FSMC):for 16 bit data asynchronous SRAM

I have found some suitable devices but It seems the address/data bus is multiplexed regarding the FSMC for SRAM, this is what we do not want.

But if I look at the STM3210E-EVAL evalution board schematics i can see that the PSRAM interface has been used for standard asynchronous SRAM?

PSRAM (Psuedo SRAM???):Can this interface be used for Asynchronous SRAM?

If so is this stated in any documentation???

Daryl

christophe239955_st
Associate II
Posted on May 17, 2011 at 12:41

Hi Daryl,

The FSMC bank1 supports the SRAM, NOR flash, SRAM and PSRAM. The address/data bus are multiplexed only by configuration. You can connect any of these memories to the bank1.

Moreover 4 banks available on bank1. So you can connect different memories on the 4 banks and just select the type of memory connected to each bank…as done on STM32F10E eval board. It’s really amazing this STM32 FMSC! Last days, I’ve seen an FSMC application note published AN2784. It helps me as well 😉

Chris.

daryl1
Associate II
Posted on May 17, 2011 at 12:41

Yes I saw the application note because I was also looking for timing parameters seeing as the data sheet says 'TBD'.

If I read the data sheets I can conclude the following for connecting asynchronous SRAM to the FSMC:

------------------------------------------------------------------------

STM32F101xx series:TQFP100 pin package address/data bus multiplexed(NOR/SRAM Mux).

------------------------------------------------------------------------

STM32F101xx series:TQFP144 pin package address/data bus seperate

(NOR/PSRAM).

------------------------------------------------------------------------

STM32F103xx series:LFBGA100 pin has multiplexed address/data

(NOR/SRAM Mux).

------------------------------------------------------------------------

STM32F103xx series:LFBGA144 pin has separate address and data bus.

(NOR/PSRAM).

------------------------------------------------------------------------

I think it is this way???

Data sheet is very confusing to read :-?

Daryl