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FSMC interfacing SJA1000, SRAM, Compact Flash

christophcoenen9
Associate
Posted on February 14, 2012 at 10:05

Hello,

I would like to use the STM32F207 in order to interface up to 8 can channels by means of the SJA1000 can controller IC. In addition there is need for Compact Flash interface, plenty of external ram and flash memory. The Flexible Static Memory Controller (FSMC) peripheral seems that it could handle these requirements, but I'm not familiar with STM32 and so I have some questions.

First of all: Using the internal CAN controller of the STM32 or using the microchip MCP2515 with SPI interface is completely out of the question! I really need 8 highspeed CAN channels with parallel interface to ensure high data throughput.

1) Does the

http://www.nxp.com/documents/data_sheet/SJA1000.pdf

fit to the FSMC? The FSMC would have to support multiplexed data/address lines in 8 bit datawidth mode. In that case, can the more significant adresslines (A8 - A10) be used to select one of the 8 can controller (with some additional hardware), or are these adress signal not present on the bus regarding to the multiplexed mode?

2) How many devices can be connected to the FSMC. According to the 

http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/REFERENCE_MANUAL/CD00225773.pdf

at section 31.4 on page 1219 there ist support for 4 x SRAM, 2 x NAND Flash, 1 x PC Card. But if you take a look at pin configuration there are only 5 pins which can be used as slave select in alternate FSMC function. Do I have this right? Only up to 5 devices can be controlled by the FSMC simultaneously?

3) I would like to interface a Compact Flash by means of the FSMC peripheral and DMA Controller. Is it possible in that configuration to write a sector of data (512 Bytes) to the CF-Cardw controlled by the DMA? In that case is there furthermore the chance to access external ram or the sja1000 if a DMA transaction is progressing in background or do I have to wait until the whole DMA transaction succeeds? What if I initiate another DMA transaction form internal SRAM to external SRAM with higher priority than the Compact Flash DMA transaction. Does the STM32 handle these transactions consecutively or effectivly parallel?

Thanks a lot!!

#fsmc-sja1000-compact-flash
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