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Internal SRAM and FIFO on STM32F107 ?

antonius
Senior
Posted on May 03, 2015 at 16:31

Guys,

How can I use Internal SRAM on STM32F107 for FIFO operation ?

Any examples for writing and reading ?

Thanks
3 REPLIES 3
Posted on May 03, 2015 at 17:46

A FIFO for what? Most buffering concepts can be constructed in software.

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antonius
Senior
Posted on May 07, 2015 at 02:16

FIFO for buffering data from ethernet....how can I send data to internal SRAM ? how can I read and write from internal SRAM address ? thanks

jpeacock
Associate II
Posted on May 07, 2015 at 14:07

A FIFO doesn't work so well when dealing with Ethernet messages, because some messages take longer to process than others, depending on the Listener.  A better approach is a pool of message buffers so that you can dispatch an incoming message to a Listener task without blocking the Ethernet stack.  When the Listener task finishes with the message it is returned to the pool.  That way multiple Listeners can run at the same time, or messages are queued to a busy Listener, and you don't have to worry about the stack dropping packets while a resource intensive message like a JSON packet is being parsed.

A message pool is very similar to managing a heap.  Allocate a large chunk of memory, and then from that pool allocate message buffers as needed.  Return the messages back to the pool when finished with them. 

Remember that TCP/IP message vary considerably in size so don't use fixed length buffers.  Not every message is 1500 bytes long, so if you allocate an array of fixed size buffers based on the maximum MTU then you can waste a lot of RAM receiving 64 byte messages in a 1500 byte buffer.  And if you support jumbo frames you'll quickly exhaust the pool with 98% or the space unused.

  Jack Peacock