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STM32F4 discovery: TIM1 configuration in PWM mode to generate and update INT with repetition counter

anoop
Associate II
Posted on April 22, 2012 at 08:16

I have configured my time 1 to operate in the PWM mode1 to generate a signal of fixed duty cycle. I want the generate an update INT every 4 th overflow of the TIM1 CNT . I have loaded value 4 into my repetition counter, which should decrement each time the CNT in TIM1 overflows and should generate an update INT when it reaches 0. I compute the duty cycle in the ISR and load it onto the preload registers.

The registers which i configure for the timer to operate in the above mentioned mode are given below:

TIM1 CR1

URS -> 1  // update request source

TIM1 RCR

RCR -> 4  // loads 4 into the reconfiguration register

TIM1 DIER

UIE -> 1   // update interrupt enable

A snippet of the code when in i initialize the registers is posted below:

int main(void)

{

   /* TIM Configuration */

  TIM_Config();

   /* Compute the prescaler value */

  PrescalerValue = (uint16_t) ((SystemCoreClock /2) / 28000000) - 1;

  /* Time base configuration */

  TIM_TimeBaseStructure.TIM_Period = 665;

  TIM_TimeBaseStructure.TIM_Prescaler = PrescalerValue;

  TIM_TimeBaseStructure.TIM_ClockDivision = 0;

  TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;

  TIM_TimeBaseStructure.TIM_RepetitionCounter=4;

  TIM_TimeBaseInit(TIM1, &TIM_TimeBaseStructure);

 

  /*  Configures the TIMx Prescaler. */

  TIM_PrescalerConfig(TIM1,PrescalerValue,TIM_PSCReloadMode_Update);

 

  /* PWM1 Mode configuration: Channel3 */

  TIM_OCInitStructure.TIM_OCMode = TIM_OCMode_PWM1;

  TIM_OCInitStructure.TIM_OutputState = TIM_OutputState_Enable;

  TIM_OCInitStructure.TIM_Pulse = CCR1_Val;

  TIM_OCInitStructure.TIM_OCPolarity = TIM_OCPolarity_High;

  TIM_OC1Init(TIM1, &TIM_OCInitStructure);

  TIM_OC1PreloadConfig(TIM1, TIM_OCPreload_Enable);

 /* Configures the TIM1 Update Request Interrupt source (SETS the CR1->URS bit)*/   

  TIM_UpdateRequestConfig(TIM1,TIM_UpdateSource_Regular);

  /*Enables or disables TIM1 peripheral Preload register on ARR */

  TIM_ARRPreloadConfig(TIM1, ENABLE);

  /* TIM1 enable counter */

  TIM_Cmd(TIM1, ENABLE);

  /*Enables or disables the TIM peripheral Main Outputs*/

  TIM_CtrlPWMOutputs(TIM1, ENABLE);

  /* Enables or disables the specified TIM interrupts */

    TIM_ITConfig(TIM1,TIM_IT_Update, ENABLE);

 

  while (1)

  {}

}

If correct me if i have missed any steps in configuring TIM1 to generate an update interrupt every 4th overflow of the CNT ( which is achieved using the Repetition counter).

-Regards

-Gandalf
2 REPLIES 2
Posted on April 22, 2012 at 16:34

It doesn't look unreasonable, no idea if you're initializing the clock source or the NVIC suitably.

Have you tested it? Is some aspect not working?

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anoop
Associate II
Posted on April 23, 2012 at 07:58

Thanks for the heads up. I forgot the initialize the NVIC.

-Gandalf