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Starting with a STM32F100CBT6B

gmwralhs9
Associate II
Posted on June 05, 2012 at 21:30

Hello,

I am new to ST micros and this is my first attempt to design a board based on a 32-bit microcontroller. I've designed a very simplistic circuit with all of the GPIO ready for use for experimenting with breadboards etc etc with external power supply (not on-board). Since I'll need to order a PCB that will take sometime to arrive to me, I need to feel some confidence that this will work, so I have attached the circuit as a PNG. Can you give a glimpse on it? A yes or no would suffice! Any suggestions would be welcomed too. Thanks 🙂
4 REPLIES 4
raptorhal2
Lead
Posted on June 06, 2012 at 01:32

It looks like you are off to a reasonable start.

A general hint: look at the schematic in the user manual for the Discovery Kit for your processsor. It will provide a reasonable reference for design. It will probably have a 64 or 100 pin layout, but you should be able to easily see what is applicable for your 48 pin configuration. For example, selection of OSC32 and related capacitors.

To reduce noise on ADC channels, VDDA should have an inductor between VDD and VDDA. If ADC noise is not a concern, then what you have will work.

Decide what to do with BOOT1, which I believe is PB2, pin 20.

When you get to the PCB layout, VDD capacitors need to be close to the uP pin. My approach is to mount them PCB bottom side under the uP.

The JTAG pullup resisters might be weak. I have used 10K. TDO should have a pulldown resister.

Cheers, Hal

alok472
Associate II
Posted on June 06, 2012 at 03:03

several schematics are available here

http://www.st.com/internet/evalboard/family/116.jsp

you can also refer to them

gmwralhs9
Associate II
Posted on June 06, 2012 at 10:27

Hi,

Thank you for your advices/suggestions. For some weird reason I thought that BOOT1 was internally grounded in the specific one, but it seems that my memory was fooling me. I guess I would have to put a 1MΩ as a pull-down/pull-up with a jumper in order to not create any trouble (wrt the valid logic levels) with using it as a GPIO with pull-up/pull-down enabled (50KΩ max according to the datasheet).

For the RF choke between VDD and VDDA, I wasn't going to use the ADC for any high sampling rates. I am impressed though that it seems that this little beast can take 800Ksamples/s for a single channel. I'll add a coil though and the stability capacitors for VDDA as you suggesting in case there is a need in the future.

For the oscillators, I have figured out a few combinations of different crystals,capacitors and R.ext for specific SMD crystals that I've chosen from Farnell but because the shipping expenses are not permitting me to order a small number of parts (we don't have a Farnell branch in my country - actually we don't have any electronics superstore) and since in the local stores they usually don't have a clue about the characteristics of the crystals that they sell (and thus they don't provide any datasheets), I will include it in the PCB design but I will work with the internal RC oscillator for the moment.

I'll change the JTAG resistors too!

Thank you again! 🙂

gmwralhs9
Associate II
Posted on June 06, 2012 at 10:28

Thanks! 🙂