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STM32F756 LTDC transfer complete interrupt after the SDRAM buffer completely read in one frame

Posted on December 08, 2016 at 00:28

Hi all.

I'm controlling a parallel device which is using 12 bits parallel interface plus clock signal. I've created a class which is containing LTDC to pass the parallel data to the device with 30 MHz clock. Device has got 1 x 720 data blocks then it needs to latch the data to it's internal memory so I need to check one frame has been sent. I didn't find any interrupt about that. I am not using DMA2D because (I think) I don't need any blending for now. Anyway, I can check the signals with scope and there is no problem. Is there any interrupt about LTDC one frame has been sent? I've tried to set Line Interrupt to line zero but interrupt isn't occurring.

LTDC_HandleTypeDef ltdc;

void LTDC_Init(void)

{

 /* LTDC Initializaition ----------------------------------------------------*/

 if (ltdc.State == HAL_LTDC_STATE_RESET)

 {

  /* Polarity configuration */

  /* Initialize the horizontal synchronization polarity as active low */

 ltdc.Init.HSPolarity = LTDC_HSPOLARITY_AL;

  /* Initialize the vertical synchronization polarity as active low */

  ltdc.Init.VSPolarity = LTDC_VSPOLARITY_AL;

  /* Initialize the data enable polarity as active low */

  ltdc.Init.DEPolarity = LTDC_DEPOLARITY_AL;

  /* Initialize the pixel clock polarity as input pixel clock */

  ltdc.Init.PCPolarity = LTDC_PCPOLARITY_IPC;

  

  /* Timing configuration */

  ltdc.Init.HorizontalSync = PIXEL_HSYNC - 1;

  ltdc.Init.VerticalSync = PIXEL_VSYNC - 1;

  ltdc.Init.AccumulatedHBP = (PIXEL_HSYNC + PIXEL_HBP - 1);

  ltdc.Init.AccumulatedVBP = (PIXEL_VSYNC + PIXEL_VBP - 1);

  ltdc.Init.AccumulatedActiveH = (PIXEL_HSYNC + PIXEL_HBP + PIXEL_HEIGHT - 1);

  ltdc.Init.AccumulatedActiveW = (KPIXEL_VSYNC + KPIXEL_VBP + PIXEL_WIDTH - 1);

  ltdc.Init.TotalHeigh = (PIXEL_HSYNC + PIXEL_HBP + PIXEL_HEIGHT + PIXEL_HFP - 1);

  ltdc.Init.TotalWidth = (PIXEL_VSYNC + PIXEL_VBP + PIXEL_WIDTH + PIXEL_VFP - 1);

  /* Initialize the lcd pixel width and height */

  ltdc.LayerCfg->ImageHeight = PIXEL_HEIGHT;

  ltdc.LayerCfg->ImageWidth = PIXEL_WIDTH;

  

  /* Background val */

  ltdc.Init.Backcolor.Red = PIXEL_RED;

  ltdc.Init.Backcolor.Green = PIXEL_GREEN;

  ltdc.Init.Backcolor.Blue = PIXEL_BLUE;

  

  ltdc.Instance = PIXEL_INSTANCE;

  

  LTDC_ClockConfig(&ltdc, NULL);

  

  HAL_LTDC_MspInit(&ltdc);

  

  if (HAL_LTDC_Init(&ltdc) != HAL_OK)

  {

   return;

  }

  

  LTDC_LayerInit();

  

  __HAL_LTDC_CLEAR_FLAG(&ltdc, LTDC_FLAG_LI);

  __HAL_LTDC_CLEAR_FLAG(&ltdc, LTDC_FLAG_FU);

  __HAL_LTDC_CLEAR_FLAG(&ltdc, LTDC_FLAG_TE);

  __HAL_LTDC_CLEAR_FLAG(&ltdc, LTDC_FLAG_RR);

  

  /*********************************************/

  HAL_LTDC_ProgramLineEvent(&ltdc, 0);

  

  __HAL_LTDC_ENABLE_IT(&ltdc, LTDC_IT_LI);  

 }

 /* SDRAM Initializaition ----------------------------------------------------*/

 if (BSP_SDRAM_Init() == SDRAM_ERROR)

 {

  return;

 }

__HAL_LTDC_ENABLE(&ltdc);

 }

void HAL_LTDC_LineEventCallback(LTDC_HandleTypeDef *ltdch)

{

 KPixel_lineEvent = 0xFF;

}

// stm32f7xx_it.c

extern LTDC_HandleTypeDef ltdc;

void LTDC_IRQHandler(void)

{

 HAL_LTDC_IRQHandler(&ltdc);

}

interrupt is rising when after the LTDC configured then I'm writing the SDRAM bus one line, it is not rising anymore.

5 REPLIES 5
ST Renegade
Senior
Posted on December 08, 2016 at 10:15

Hey there,

there is nothing like one frame has been sent or so, however the LTDC controller has the V-Sync interrupt. So once one whole frame has been displayed, a V-Sync is generated. During this period it's advised to switch the pointer of the LTDC to another buffer to avoid any distortion...

So V-Sync is what you are looking for in my opinion.

I hope this helps! Have a nice day,

Renegade

Posted on December 12, 2016 at 08:07

Thanks

Musil.Vojtech

‌. Probably V-Sync is what I'm looking for. At the Reference Manual's page 526, LTDC_CDSR register has VSYNCS bit, which can show me the status of V-Sync. I want to learn that can I assign that bit to an event or must I poll it? Thanks again.

Posted on December 12, 2016 at 12:09

I've looked for V-Sync interrupt in the reference manual but I didn't see any info about it. I just found LTDC_CDSR bit which is VSYNC S, status bit for V-Sync signal.

Posted on December 12, 2016 at 13:41

Going through the chapter of LTDC, there you can find a the LTDC has 4 interrupts, where one of them is the Register Reload interrupt.

Register Reload interrupt: generated when the shadow registers reload was performed during the vertical blanking period

So you need to enable this interrupt and the new values will be taken into account after V-Sync, not immediately. This functionality can be configured in the LTDC_SRCR register. However this bit is clear right after vertical blank...

Take a look into the ST HAL library how do they handle it. 🙂

Renegade

Posted on March 04, 2017 at 13:56

It is some late but Thanks

Musil.Vojtech

. I'm now finished and waitingthe board. Probably this is going tosolve my problem.