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STM32F4 missing Table in RM0090

thomasguenther9
Associate
Posted on August 17, 2012 at 10:35

Hello,

according to internal triggering of timer2 to timer5 using the STM32F4, there is a table (Table 60: TIMx internal trigger connection on page 395) referenced but missing in the document RM0090. Does anybody know where to find this information instead?

Thanks in advance

#timer-stm32f4 #trigger #stm32
3 REPLIES 3
Posted on August 17, 2012 at 11:44

Table 62 at page 4

The timers' description in this manual is a bad joke. Not only the text is far from a clear technical description and contains loads of typos and factual errors (some of them obviously of the copy/paste origin), the triplication of the timers' chapter (which are different within the individual ''chapters'' anyway) serves only confusion and inflates the manual unnecessarily.

Attached is a table of the various timers' properties I concocted from the available information. The usual denying-all-responsibility disclaimers apply.

Enjoy!

JW

________________

Attachments :

STM32F4xx_timers.pdf : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006HtXp&d=%2Fa%2F0X0000000aRZ%2FYJmIAnf85m6P3wWKWHr3eJn.eE67ktR7N0VSwwbXDHw&asPdf=false
Posted on August 17, 2012 at 16:26

Thanks for the table Jan. The timers are one of the more painful aspects of the STM32 family. I've had to comb over the block diagrams to decipher what the heck they might be capable of, and often concluded the solution is a bit of mess.

Something that might help would be a wizard tool that could contain all the connectivity options, like Jan's table, and a functional goal. It would include task optimal TIM selection, and chaining options. And could diagram the input/output signals and what could be measured or generated.

That, or a catalogue of examples, with a want-this, do-this type presentation with working code and diagrams.

Among my gripes with the designs have been 16-bit implementation, lame prescaler/dividers, single increment/decrement element, sychronizing/chaining, and atomic reading of chained timers

https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/Flat.aspx?RootFolder=https://my.st.com/public/STe2ecommunities/mcu/Lists/cortex_mx_stm32/TIM5 timer problem&FolderCTID=0x01200200770978C69A1141439FE559EB459D7580009C4E14902C3CDE46A77F0FFD06506F5B&currentviews=103

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thomasguenther9
Associate
Posted on August 20, 2012 at 09:07

Thanks, this table helped me solving the problems with the timers.

Regards

Thomas