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Odd clock issue on STM32F0DISCOVERY

johnjohn9105
Associate III
Posted on August 29, 2012 at 02:18

I wanted to explore the SYSCLK on the STM32F0DISCOVERY board so I wrote a quick program to route SYSCLK to the MCO pin. I connected a logic analyzer to the pin and I see a ~200Hz clock with lots and lots of noise on it. I'm wondering if anyone can help me determine what's going on. The screenshot is

http://www.flickr.com/photos/86033340@N05/7883954302/in/photostream

. When I break into the debugger and set RCC_CFGR.MCO to 0b101, I get a

http://www.flickr.com/photos/86033340@N05/7883953506/in/photostream/

. When I change MCO back to 0b100 (SYSCLK), I get this strange signal again. My source code is below; it's really an only slightly modified version of the Atollic default project. I'm sure there's probably something external to the code that I pasted that affects SYSCLK, but I don't know what that would be. Can anyone tell me what I'm seeing in the logic analyzer output? The logic analyzer is capturing at 24MHz.

int main(void)
{
GPIO_InitTypeDef GPIO_InitStructure;
/* TODO - Add your application code here */
SysTick_Config(4800); /* 0.1 ms = 100us if clock frequency 12 MHz */
SystemCoreClockUpdate();
ii = SystemCoreClock; /* This is a way to read the System core clock */
ii=0;
//enable the peripheral clock on GPIO Port A.
RCC_AHBPeriphClockCmd(RCC_AHBPeriph_GPIOA, ENABLE);
//configure the MCO pin to output the SYSCLK. We need to set
//bits 26:24 of RCC_CFGR to 100
RCC->CFGR &= 0b11111000111111111111111111111111;
RCC->CFGR |= 0b00000100000000000000000000000000;
//Configure PA8 to alternate function MCO
GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF; //alternate function mode
GPIO_InitStructure.GPIO_OType = GPIO_OType_PP; //push-pull output type
GPIO_InitStructure.GPIO_Pin = GPIO_Pin_8;
GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL; //no pullup/pulldown
GPIO_InitStructure.GPIO_Speed = GPIO_Speed_Level_3; //fast
GPIO_Init(GPIOA, &GPIO_InitStructure); //apply the settings to PA8
GPIO_PinAFConfig(GPIOA, GPIO_PinSource8, GPIO_AF_0); //set alternate function 0 for PA8
while(1)
{
}
}

1 REPLY 1
Posted on August 29, 2012 at 05:30

SYSCLK @ 48 MHz, sampling at 24 MHz, you're probably seeing aliasing effects and the sample point slip over time as the relative frequency error accumulates. Use a scope with higher bandwidth.

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