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SPI1 initialization on STM32F405RG

neoirto
Associate II
Posted on October 27, 2012 at 16:52

Hi all,

I try too setup an SPI1 com with my STM32F405RG. The datashhet of the component says :

SPI Operational Features

 

1. Data is delivered MSB first and LSB last

 

2. Data is latched on the rising edge of SCLK

 

3. Data should be transitioned on the falling edge of SCLK

 

4. The maximum frequency of SCLK is 1MHz

 

5. SPI read and write operations are completed in 16 or more clock cycles (two or more bytes). The

 

first byte contains the SPI Address, and the following byte(s) contain(s) the SPI data. The first

 

bit of the first byte contains the Read/Write bit and indicates the Read (1) or Write (0) operation.

 

The following 7 bits contain the Register Address.

And here is my initialization code (don't work actually) :

GPIO_InitTypeDef GPIO_InitStructure;

/* Peripheral Clock Enable -------------------------------------------------*/

RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);

/* Enable GPIO clocks */

RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_GPIOA, ENABLE);

GPIO_PinAFConfig(GPIOA, GPIO_PinSource5, GPIO_AF_SPI1);

GPIO_PinAFConfig(GPIOA, GPIO_PinSource6, GPIO_AF_SPI1);

GPIO_PinAFConfig(GPIOA, GPIO_PinSource7, GPIO_AF_SPI1);

GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;

GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;

GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;

GPIO_InitStructure.GPIO_PuPd  = GPIO_PuPd_DOWN;

GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_6 |GPIO_Pin_7;

GPIO_Init(GPIOA, &GPIO_InitStructure);

#define SPI_INTERRUPTS_ALL              (SPI_I2S_IT_TXE  |           \

SPI_I2S_IT_RXNE |           \

SPI_I2S_IT_ERR)

SPI_InitTypeDef  SPI_InitStructure;

SPI_I2S_DeInit(SPI1);

SPI_InitStructure.SPI_Mode = SPI_Mode_Master;

SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;

SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;

SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; /// cad polarity SPI_MODE_0

SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; /// cad phase SPI_MODE_0

SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;

// SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_64;

// SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_128;

SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_256;

SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;

SPI_InitStructure.SPI_CRCPolynomial = 7;

/* Initializes the SPI communication */

SPI_Init(SPI1, &SPI_InitStructure);

SPI_I2S_ITConfig(SPI1, SPI_INTERRUPTS_ALL, DISABLE);

  SPI_I2S_ITConfig(SPI1, SPI_I2S_IT_RXNE, DISABLE); /// on autorise les interruptions sur SPI1   RXNE : reception n'est pas vide

SPI_I2S_ITConfig(SPI1, SPI_I2S_IT_ERR, DISABLE); /// on autorise les interruptions sur SPI1   RXNE : reception n'est pas vide

NVIC_InitTypeDef NVIC_InitStructure;

/////// Configure the Priority Group to 1 bit                 

NVIC_PriorityGroupConfig(NVIC_PriorityGroup_2);

  

//// Configure the SPI interrupt priority 

NVIC_InitStructure.NVIC_IRQChannel = SPI1_IRQn;

NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;

NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0;

NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;

NVIC_Init(&NVIC_InitStructure); 

    SPI_Cmd(SPI1, ENABLE);

If you see anything strange or wrong in my code, I'll be pleased of your help...
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