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STM32L0 96MHz mode or bad docs

Dvorak.Peter
Senior II
Posted on October 07, 2016 at 02:39

As a noob, I need to know whether there is a 96MHz mode as the documentation sugests

====================================

C:\Users\PD\STM32Cube\Repository\STM32Cube_FW_L0_V1.7.0\Drivers\STM32L0xx_HAL_Driver\Src\stm32l0xx_ll_utils.c

void LL_SetSystemCoreClock(uint32_t HCLKFrequency)

/**

  * @brief  This function configures system clock with HSI as clock source of the PLL

  * @note   The application need to ensure that PLL is disabled.

  * @note   Function is based on the following formula:

  *         - PLL output frequency = ((HSI frequency * PLLMul) / PLLDiv)

  *         - PLLMul: The application software must set correctly the PLL multiplication factor to avoid exceeding

  *           - 96 MHz as PLLVCO when the product is in range 1,

  *           - 48 MHz as PLLVCO when the product is in range 2,

  *           - 24 MHz when the product is in range 3

-------------------------------------------------

UM1749  User Manual

Description of STM32L0 HAL and Low-layer drivers

1352/1438 DOCID026232 Rev 5

LL_PLL_ConfigSystemClock_HSI

Notes

The application need to ensure that PLL is disabled.

Function is based on the following formula: PLL output

frequency = ((HSI frequency * PLLMul) / PLLDiv)PLLMul: The

application software must set correctly the PLL multiplication

factor to avoid exceeding 96 MHz as PLLVCO when the

product is in range 1,48 MHz as PLLVCO when the product is

in range 2,24 MHz when the product is in range 3

FLASH latency can be modified through this function.

2 REPLIES 2
Walid FTITI_O
Senior II
Posted on October 07, 2016 at 13:04

Hi dvorak.peter, 

Yes it seems that these are typos on the user manual UM1749 document.

The maximum frequency on STM32L0x is 32 MHz. Make always the Reference manual and datasheet, the first sources of information.

I submit a request to fixt that.

Thank you for the feedbacks.

-Hannibal-
Amel NASRI
ST Employee
Posted on January 09, 2017 at 16:14

Hi

Dvorak.Peter

‌,

Back to this discussion in order to more understand the case:

1- to know the maximum ystem clock frequency, you have to refer to the datasheet of your product (General Operating Conditions). It is 32 MHz

2- In UM1749 as well as drivers in the Cube package, the 96 MHz is the maximum PLLVCO clock frequency. It is related to the configuration of PLLMUL as described in the reference manual:

0690X000006060pQAA.png

-Amel-

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