Posted on March 25, 2015 at 10:23Hi all,
I'm using STM32F030 and want to send 8 bits data using SPI1. I set data frame size to 8 bits but the SPI sends 16 clocks and the 8 bits data is sent during first 8 clocks. The documentations of the STM32F030 says:
Data packing:
When the data frame size fits into one byte (less than or equal to 8 bits), data packing is
used automatically when any read or write 16-bit access is performed on the SPIx_DR
register. The double data frame pattern is handled in parallel in this case. At first, the SPI
operates using the pattern stored in the LSB ofthe accessed word, then with the other half
stored in the MSB. Figure 251 provides an example of data packing mode sequence
handling. Two data frames are sent after the single 16-bit access the SPIx_DR register of
the transmitter. This sequence can generate just one RXNE event in the receiver if the
RXFIFO threshold is set to 16 bits (FRXTH=0). The receiver then has to access both data
frames by a single 16-bit read of SPIx_DR as a response to this single RXNE event. The RxFIFO threshold setting and the following read access must be always kept aligned at the
receiver side, as data can belost if it is not in line.
A specific problem appears if an odd number of such “fit into one byte� data frames must be
handled. On the transmitter side, writing the last data frame of any odd sequence with an 8-bit access to SPIx_DR is enough. The receiverhas to change the Rx_FIFO threshold level
for the last data frame received in the odd sequence of frames in order to generate the
RXNE event.
So obviously the problem is the data packing. Can someone tell me how to send data without this data packing?
Thanks!
OK, here is the solution :
but although I set RX FIFO level to quarter
SPI_RxFIFOThresholdConfig(SPI1, SPI_RxFIFOThreshold_QF); after sending 8 bits data the code waiting in this check:
while((SPI1->SR & SPI_I2S_FLAG_RXNE)==RESET);
Any suggestions?
