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PSRAM and LCD conflict ?

warcatz
Associate II
Posted on May 02, 2013 at 16:22

Hi ,

I am getting a little problem with my LCD.

It run well on my old board with fsmc.

It was connected for FSMC_Bank1_NORSRAM1

fsmc_a16 was the RS pin and declaration was :

#define LCD_REG              (*((volatile unsigned short *) 0x60000000)) /* RS = 0 */

#define LCD_RAM              (*((volatile unsigned short *) 0x60020000)) /* RS = 1 */

Now , i have build a 'better' board 😉 , i have PSRAM on FSMC_Bank1_NORSRAM2 ,

the LCD is on FSMC_Bank1_NORSRAM3.

The LCD RS pin is now on fsmc_a0 , then the declaration is :

#define LCD_REG              (*((volatile unsigned short *) 0x68000000))     /* RS = 0 */

#define LCD_RAM              (*((volatile unsigned short *) 0x68000002))     /* RS = 1 */

If i understand correctly how it work it must be ok , but it's not ....

Then my question is , can the PSRAM address or data port have any influence on the

common pins with the LCD ?

On my old board it was no external memory and it worked well.

I have test on 2 of my new board , one with pull-up resistors on the data port and one without , on both board the memory continue to work ok , but i'm not able to use the lcd.

If someone have a idea ...

Cheers.

11 REPLIES 11
Posted on May 02, 2013 at 16:39

Do you have a schematic?

Do you have a scope or logic analyzer?

ST's EVAL series boards seem to combine the two, looked at those?

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warcatz
Associate II
Posted on May 02, 2013 at 17:46

Hi Clive 🙂

Sure , i have Schematic , oscope and analyzer.

I post the schematic from my board and from the little core board.

PSRAM and NAND Flash are populated on the core board , no SRAM or NOR Flash are present.

I have look at the ST Eval too it's why i don't see where i do my mistake 🙂

I see ST Eval use SRAM and not PSRAM , but i think that can't be the problem.

The working project from my old board and the project from the new board are upped too.

Cheers.

________________

Attachments :

glcd_1963_no_PSRAM_LCD_Working.zip : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I13Y&d=%2Fa%2F0X0000000bhW%2Fw0slIYD.LMU_Lx64K2Ftd9o6Txgvw3Bjm37qW4Wm5Jc&asPdf=false

glcd_1963_with_LCD_NOT_Working.zip : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I11N&d=%2Fa%2F0X0000000bhV%2FAsQAjY7vF7DBGjgSLpyBKfhamTykLPILQTVia1TdvSs&asPdf=false

HYMB.PDF : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I13S&d=%2Fa%2F0X0000000bhT%2FnO1IlJhFXsc01y3pK7vl3c6WbXNhJCUqc1.rub3OrpI&asPdf=false

HY-STM32F2xxCore144_SCH-1.pdf : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I13N&d=%2Fa%2F0X0000000bhU%2FZOKd5TSRTIefDAJ0k1vB5K.9zxMponLiIfQd5SySpJs&asPdf=false
warcatz
Associate II
Posted on May 03, 2013 at 21:58

Today i have check the schematic etc , then connected to oscope and logic analyzer , it was nothing special to see.

Every signals seems to be good.

I think i go for made test in software mode (no fsmc) for see if i can get a picture.

Cheers.

Posted on May 04, 2013 at 00:57

I didn't see a schematic for the board that didn't work.

You want to be looking at the signalling pins to the LCD, and consider if other aspects of the LCD are functioning, ie clocked, powered, etc.
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warcatz
Associate II
Posted on May 04, 2013 at 09:18

Hello Clive ,

Schematic who LCD don't work is the HYMB.pdf , the other pdf is the schematic from the core board with the stm32f407zgt6 on it.

The old board external stm32 clk was 8Mhz , this one have a 25Mhz one.

the system_stm32f4xx.c and stm32f4xx.h are correct for the 25Mhz external clock.

For the rest it's the same , just that i have now memory on the core board ... he he he 😉

I add a screen-shot from a part of the logic analyser data , you will see that everything is ok too ....

RS,WR,CS and 5 data pin are on the picture , i just have a 8 input analyser 😉

I have play with the FSMC_AddressSetupTime , FSMC_AddressHoldTime and FSMC_DataSetupTime too , result are the same here too ....

I go now look to made it work in pure software without fsmc for see what append , so i will

be fixed from where this annoying thing is coming 🙂

Cheers.

________________

Attachments :

logic_LCD.jpg : https://st--c.eu10.content.force.com/sfc/dist/version/download/?oid=00Db0000000YtG6&ids=0680X000006I12B&d=%2Fa%2F0X0000000bhS%2FjgIRww84rJtTrSBNkTF3Ab6jWoVqDbCgVjuU_MsVPAk&asPdf=false
warcatz
Associate II
Posted on May 05, 2013 at 20:06

So , i finished the 100% software mode for the LCD....

It work !

But , because the pins are in GPIO_Mode_OUT and are shared with the PSRAM on fsmc who are in GPIO_Mode_AF , the PSRAM no more want work :(

I found something strange too , between the working LCD with fsmc and the one in 100% software , the functions to show characters on screen are exactly the same , but , they don't work here ...

The only difference between the 2 are that one put pixels with fsmc the other do it with software.

If i can show pixels , lines etc in software mode i don't understand why it don't want show the characters , that's just pixels too ... 🙂

I have retry without characters in fsmc mode , here i get some results , but not able to show independent pixels , just fill the LCD memory for clear it ...

It's very strange , or , is it a big difference between stm32F407IGT6 and stm32F407ZGT6 ???? (for me the igt6 have just some pins more)

On the IGT6 everything was ok.

But IGT6 was clocked with a 8Mhz external crystal , the ZGT6 have a 25Mhz one.

I have recheck the system_stm32f4xx.c and stm32f4xx.h to be sure they was correct.

And on the scope i have look that the Delay_ms put me the correct time out from a pin.

Nah !! , now i have to try to imagine why it don't want work correctly with the same code ....

Cheers.

Posted on May 06, 2013 at 17:37

Schematic who LCD don't work is the HYMB.pdf , the other pdf is the schematic from the core board with the stm32f407zgt6 on it.

 

How do you have SCRRS jumper?
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warcatz
Associate II
Posted on May 06, 2013 at 18:14

Hello Clive 🙂

Yes , SCRLED , SCRRS and SCRRST1&2 are set.

I think all is just timing issue.(but not sure).

I commented out the part with ''Display_String(150, 0, ''Darth Vader'', White);'' and other

functions who use String too and I'm able to use the LCD_Clear function.

But .. is everytime a but ... , sometimes it crash the LCD who no more respond , sometimes it work.

Now the funny part ... ,i have try to just show 10 pixels with LCD_SetPoint(x, y , rndcol); , it have work .

Now i tested with 100 pixels , was ok too , after that i tried with 1000 or more , LCD crash ... hmmmm.

I for sure check that my counter was a uint32_t 😉

In debug mode i can go inside the Display_String function and i can see the pixels appear , but only step by step.

When i try to show the char complete other than step by step , LCD Crash .

From what i am not more sure now is my fsmc setting (same as the working board with the igt6 chip)

I have retake a look at the SSD1963 data-sheet and timing are :

Clock cycle time : 9nS

CS Low : 9nS

CS High : 9nS

Addr setup time : 1nS

Addr Hold time : 1nS

Data setup time : 4nS

Data Hold time : 1nS

Data Access time : 5nS(max)

Output Hold time : 1nS

1 cycle time from the stm32 at 168Mhz is 5.952nS , normally , i am slower than what the SSD1963

can do but with bad results (on this board).

I tested with 2 different board , 2 different core board (stm32f407zgt6) and 2 different LCD for be sure that is not the material.

I have now 10k pull-up resistors on CS,RS,RD,WR and D0 - D15.

I have 1st fear that the PSRAM will no more work but this is ok , but LCD don't work better ...

If it continue i have to find a little core board with a igt6 fitted with external ram that i can (probably) get result like before.

My software mode driver work perfectly with all graphics (but allot slower than fsmc) , it's just the Display_String who sometimes give me a hardware fault , no clue why ...

Cheers.

Posted on May 06, 2013 at 18:49

I think all is just timing issue.(but not sure).

That would be something you could determine from the scope/analyser, are the signals placed within spec?

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