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Can I2S3 be configured as Rx slave, with an external clock ?

Posted on May 30, 2013 at 15:28

Can I2S3 be configured as Rx slave, with an external clock ?

RM0090 says nothing on the contrary, but looking at the stm32f4xx_rcc.h include file I see this definition, which relates to I2S2, but there is not a similar one for I2S3...

#define RCC_I2S2CLKSource_Ext ((uint8_t)0x01)

I need to use I2S3 to avoid a DMA conflict that I would have should I use I2S2, so I coded this statement :

 // Enable the I2Sx/I2Sx_ext clock
 
RCC_I2SCLKConfig(RCC_I2S2CLKSource_Ext)

In other words, I used the RCC_I2S2CLKSource_Ext specification, lacking a similar one for I2S3. Everything works, but there are erratic losses of sync on the data, as if I2S3 actually did not use the external clock as sync source. Which is in error, the RM0090 manual, or the include file ? Or may be the culprit is on me, who failed to understand how things work ? TNX
5 REPLIES 5
Posted on May 30, 2013 at 16:18

Note: I2S2_ext an I2S3_ext are used only in full-duplex mode.

 

..

 

The extended I2Ss (I2Sx_ext) can be used only in full duplex mode. The I2Sx_ext operate always in slave mode.

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Posted on May 30, 2013 at 16:28

 RCC_I2SCLKConfig(RCC_I2S2CLKSource_Ext);

Controls whether the I2S peripherals derive their clock from I2S_CKIN (PC9) vs PLLI2S. This is typically MUCH higher than the bit clock.
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Posted on May 30, 2013 at 18:30

Thanks for the answer. Forget the mention to I2Sx_ext, it is only in the comment, I don't use full duplex mode.

I configured this pin assignment, which seems to be legal according to the chip Ref. Man.

/*

* Connections between FDM and Discovery are as follows:

* Master Clock Input MCLK = I2S3_CKIN pin PC7

* Bit Clock Input BITCLK = I2S3_CK pin PC10

* Word Sync Input LRCLK = I2S3_WS pin PA15

* I2S Data input: DIN = I2S3_SD pin PC12

*/

Data are received, the problem is that after reset sometimes they are correct, other times they look like sync was not achieved... when they are in sync (i.e. when they are just what I expect them to be) they stay in sync until next reset,

Posted on May 30, 2013 at 18:40

 RCC_I2SCLKConfig(RCC_I2S2CLKSource_Ext); // Pulls a clock from PC9, no where else. It is there for situations where I2SPLL can't generate audio compatible frequencies due to the chronic limitations of the ST clocking/pll design.

If you use this, I'd expect it to be feed with a clock which is synchronous with your slave clock. I'd also expect the I2S pins to be resynchronized, but most likely with the AHB clock.
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Posted on May 31, 2013 at 00:55

Well, I found a solution... at least it seems to work now....

Nowhere in the manuals I did read of the need to synchronize with the WS clock before enabling the I2S interface... What made my code running perfectly (so far.. I'm keeping my fingers crossed...) is this sequence :

// Enable the I2Sx peripheral, after syncing with WS 
WaitForWS_Clock_Edge(0);
WaitForWS_Clock_Edge(1);
I2S_Cmd(I2Sx, ENABLE); 
................................
................................
// WS waiting function:
static
void
WaitForWS_Clock_Edge(u8 edge)
{
if
(edge>0) 
// wait for WCLK=1
while
(0==(I2Sx_WS_GPIO_PORT->IDR & I2Sx_WS_PIN));
else
// wait for WCLK=0
while
(0!=(I2Sx_WS_GPIO_PORT->IDR & I2Sx_WS_PIN));
}
//------------------------------------------------------------

I post it here, maybe it is of help to somebody else, or maybe somebody can tell me that I am wrong... 🙂