STM32F2xx RTC: LSE Jitter problem

[andywild2]

Posted on November 18, 2014 at 15:38

Hello to all,

For calibration I use Timer 5 Capture-Channel4 to measure the LSE Clock on a STM32F207 CPU. However the result was variing +- 20 Hz. To deviate external crystal issues I routed LSI to the Timer 5 capture circuit. I still discovered about the same jitter in the frequency. In order to check my Timer5 measurement I changed the capture input to PA3 GPIO which was driven by an external stable frequency. The reading of the Timer 5 result was perfectly stable now! So I gradually doubted the stability of the 32KHz LSE in general. To verify this I routed the LSE frequency to MCO1 (PA8). Indeed with a scope I could see the jitter of the 32Khz signal! Has anybody an idea why this signal can be so unstable, even though there is no PLL involved? Thanks a lot for your comments! Andy

[waclawek.jan]

Posted on November 18, 2014 at 20:20

Post the relevant RCC registers' content.

Do you have *all* supply pins connected and properly decoupled? Is the power supply rock stable? Mind, the LSE oscillator is in the VBAT supply domain. How do you return the crystal loading capacitors? Btw. - irrelevant, but there's no PLL which could be fed by LSE in STM32F2, AFAIK 🙂 JW

[andywild2]

Posted on November 20, 2014 at 18:11

Hello Jan,

Here is the only RCC + BackUpDomain initialisation I do:  RCC_APB1PeriphClockCmd(RCC_APB1Periph_PWR, ENABLE);  PWR_BackupAccessCmd(ENABLE);  RCC_LSEConfig(RCC_LSE_ON);  RCC_RTCCLKConfig(RCC_RTCCLKSource_LSE);      RCC_RTCCLKCmd(ENABLE);     RCC_AHB1PeriphClockCmd(RCC_AHB1Periph_BKPSRAM , ENABLE);      PWR_BackupRegulatorCmd(ENABLE); The power supply is stable and decoupled. It is a good hint with the Vbat Domain, however the LSI signal shows the same jitter! So the LSI internal oscillator is not in the Vbat domain. What do you mean with ''How do you return the crystal loading capacitors?'' We copied the circuit 1:1 from the Keil EvalBoard McbStm32F200. Meanwhile I took 1 second period between first capture and last capture (wait 32768 edges in between the captures). With this huge averaging the result is stable and can thus be displayed to the customer. best regards to you Andy

[Tesla DeLorean]

Posted on November 20, 2014 at 19:14

I think what he's asking is how is the PCB layout constructed in and around the LSE.

Have you reviewed the STM32/8 crystal application note? It's all very sensitive to the exact crystal and loading, did you use the Keil BOM too? Or some randomly selected crystal? The STM32s expects one in the 6-7pF range, not the more common 9pF or 12pF ones.

http://www.st.com/st-web-ui/static/active/en/resource/technical/document/application_note/CD00221665.pdf

These are the one's ST uses on the DISCO boards (when populated), along with 6.8pF capacitors.

http://www.mouser.com/ProductDetail/Epson-Timing/MC-306-327680K-E3ROHS/?qs=CU9taR8hkvbntLhqKVy/5g%3D%3D

Correct LSI is not powered from the backup domain (per Ref Manual), so will stop when regulators turned off. Hopefully you have some delays/loops in your code, the LSE can take a long time to start.

[waclawek.jan]

Posted on November 20, 2014 at 19:32

> Here is the only RCC + BackUpDomain initialisation I do:

OK, but what is the state of the RCC registers after all this, e.g. when you output LSE onto MCO1? > the LSI signal shows the same jitter! I would expect LSI to have *some* jitter simply because it's an internal RC oscillator. I fail to see why would it be *the same* jitter. LSI can't be output onto MCO, so it's the jitter measured through TIM5, isn't it? What's the clock source into TIM5? Isn't *that one* (i.e. the timer clock, possibly APB clock, i.e. system clock) the source of percieved jitter? Can you quantify the jitter measured directly through MCO and indirectly through TIM5? > What do you mean with ''How do you return the crystal loading capacitors?'' The arrangement of grounds from the loading capacitors into the ground pins of mcu. > We copied the circuit 1:1 from the Keil EvalBoard McbStm32F200. But not the layout, did you? JW

[waclawek.jan]

Posted on November 20, 2014 at 19:36

> Have you reviewed the STM32/8 crystal application note? It's all very sensitive to the exact crystal and loading, did you use the Keil BOM too?

> Or some randomly selected crystal? The STM32s expects one in the 6-7pF range, not the more common 9pF or 12pF ones. Very good remark; however, I'd expect startup/stability/precision problems rather than significant jitter. Although, with marginal stability, the resulting symptoms when observing the output probably may look like jitter - I don't have much low-frequency-crystal-oscillator experience. JW

[Tesla DeLorean]

Posted on November 20, 2014 at 19:44

LSI can't be output onto MCO, so it's the jitter measured through TIM5, isn't it? What's the clock source into TIM5? Can you quantify the jitter measured directly through MCO and indirectly through TIM5?

As I recall ST's example code to measure the clock, uses the 8X prescaler, and then throws away all the accuracy by doing the integer math backwards.

[andywild2]

Posted on November 20, 2014 at 20:18

Thanks to all the comments!

Sure the LSI jitter I measured with the timer 5 only. It cannot be sent to MCO1. The timer5 itsself is perfect, because with external frequency  supplied to GPIO there is no jitter at all. The clock source to timer 5 is 60MHz internal. The frequency variation on LSE is about +- 20Hz measured via the result of timer 5. Yes we copied the circuit from Keil , not the layout.  I will therefore check the Keil board for the 32Khz jitter issue. Thanks for your help Andy

[Tesla DeLorean]

Posted on November 20, 2014 at 21:38

These can be modified for LSE, and to not use interrupts, and fix the math

STM32F2xx_StdPeriph_Lib_V1.1.0\Project\STM32F2xx_StdPeriph_Examples\RTC\RTC_LSI\main.c

/**
* @brief Configures TIM5 to measure the LSI oscillator frequency.
* @param None
* @retval LSI Frequency
*/
uint32_t GetLSIFrequency(void)
{
...
/* TIM5 configuration: Input Capture mode ---------------------
The LSI oscillator is connected to TIM5 CH4
The Rising edge is used as active edge,
The TIM5 CCR4 is used to compute the frequency value
------------------------------------------------------------ */
TIM_ICInitStructure.TIM_Channel = TIM_Channel_4;
TIM_ICInitStructure.TIM_ICPolarity = TIM_ICPolarity_Rising;
TIM_ICInitStructure.TIM_ICSelection = TIM_ICSelection_DirectTI;
TIM_ICInitStructure.TIM_ICPrescaler = TIM_ICPSC_DIV8; // TIME 8 PERIODS OF LSI FOR BETTER ACCURACY/PRECISION

TIM_ICInitStructure.TIM_ICFilter = 0;
TIM_ICInit(TIM5, &TIM_ICInitStructure);
...
/* Get PCLK1 prescaler */
if ((RCC->CFGR & RCC_CFGR_PPRE1) == 0)
{
/* PCLK1 prescaler equal to 1 => TIMCLK = PCLK1 */
return ((RCC_ClockFreq.PCLK1_Frequency / PeriodValue) * 8); // COMPUTE AND THROW AWAY ACCURACY
}
else
{ /* PCLK1 prescaler different from 1 => TIMCLK = 2 * PCLK1 */
return (((2 * RCC_ClockFreq.PCLK1_Frequency) / PeriodValue) * 8) ; // WHO CODED THIS?!?!
}
}