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L6480 Abnormal over current detection behaviour

Phlip Cornelissen
Associate III
Posted on April 10, 2017 at 09:44

Hi

Abnormal over current detection behaviour on stepper motor controller L6480. After initialization a hard stop command is given to hold the stepper motor, which seems to work just fine, all the expected waveforms appear on the gates of the transistors. When a move command of 128 micro-steps are given the bridge disengaged with no errors in the status register. After a hard HiZ command and another hard stop command the status register shows an over current fault and phase loss A and B faults! How do I proceed to overcome this situation?

Register setup:

CONFIG = 0x3880 (PWM div fact=2, PWM mul fact=1.75, VCCVAL=7.5,UVLOVAL=6.3,Bridge shut down on over current detection)

GATECFG1 = 0x04FD (WD_EN disabled, TBOOST=375ns, IGate=96mA, TCC=3750ns)

GATECFG2 = 0xE2 (TBLANK = 1000ns, TDT=375ns)

STEP_MODE = 0x07 (128 microsteps)

OCD_TH = 0x1F (1V, the maximum)

KVAL_HOLD = 0x25 (0.15xVs where Vs=13V)

KVAL_RUN =0x52 (0.33xVs where Vs=13V)

KVAL_ACC  = 0x64 (0.4xVs where Vs=13V)

KVAL_DEC = 0x32 (0.2xVs where Vs=13V)

MAX_SPEED = 0x34 (800 steps/s)

MIN_SPEED = 0x00 (0 steps/s)

ACC = 0x89 (2000 steps/s^2)

DEC = 0x89 (2000 steps/s^2)

FS_SPD = 0xA0 (2449 steps/s)

The transistors used are all IRF520N (100V, 9.7A, RDSon = 0.2 ohm, Qg total gate charge = 25nC max).Choice of transistors focused on the low gate charge. STB35NF10 were also used with less success due to the higher total gate charge of 55nC typical, although the RDSon is a mere 0.035 ohm.

Any advise welcome.

Best regards

1 ACCEPTED SOLUTION

Accepted Solutions
Phlip Cornelissen
Associate III
Posted on July 12, 2017 at 08:41

This abnormal over current detection behaviour is finally cleared. An unoptimized drive configuration with an imporper hardware setup will cause UVLO and OCD errors and in no particular order or at any given rate of occurance, hence a random behaviour so to speak.

View solution in original post

9 REPLIES 9
Enrico Poli
ST Employee
Posted on April 19, 2017 at 14:58

Some comments on your configuration:

  • Gate drivers config is not optimized. You should select gate current and tcc in order to have Igate x tcc slightly greater than  Qg
  • Why you are using VCC at 7.5 V? It is recommended for logic level MOSFEWTs only. 

Do you have the OCD and STALL failures only? Please check if in some way you have a reset during operation (configuration registers back to default).

Phlip Cornelissen
Associate III
Posted on April 20, 2017 at 10:58

Hi

I changed the VCC to 15V. I tested 3 different settings for IGate and TCC for a Qg of 25nC, all of which give me now an UVLO error, very view times an OCD error pops up however, I could not capture a surge in the Vs or VSREG inputs on the oscilloscope. The registers of cause are all reset due to the UVLO.

When I switch the L6480 to step clock mode, the un-optimized settings holds the motor with no error and with step pulses the waveforms change but without motor movement. The lower settings also gave an UVLO error in step clock mode. I did not capture any other error though.

Any suggestions?

Posted on April 26, 2017 at 14:48

Can you check the supply during operation?

The voltage mode driving implemented by the L6480 could cause strong current if the configuration is not optimized. These strong currents could reach the very limit for your power supply.

Phlip Cornelissen
Associate III
Posted on May 04, 2017 at 09:22

Hi

I managed to capture surges on the power supply line. The worst seems to be a dip from 13vdc down to 10volts. It might be possible that even faster surges are present but couldn’t capture those. The 10 volts is still above the UVLO setting of 6.3 volts! The question is then how did the controller reset if these surges above the UVLO was responsible or if there were surges that dipped through the UVLO threshold that reset the controller, what is the minimum time duration for such a surge to actually trigger an UVLO?

I ran some additional test to figure out the behaviour of the mosfet drive unit. The aim was to set the charge to about 25nC since this is the Qg max of my mosfets. I found that the longest time setting on TCC at 3750 nS and 8mA for IGATE (gives about 30nC) is the only setting that works. Not only can this hold the motor with a hard stop command but can turn the motor too without any UVLO, reset of even overcurrent event! No other setting with a higher current and shorter time that achieve 30nC works. Is this because higher current settings tend to saturate the gates easier or perhaps the drivers in the controller?

Does anyone have an explanation for this behaviour?

jitendra suthar
Associate II
Posted on June 21, 2017 at 09:19

hello 

  i am driving bipolar stepper motor using l6480. everything is fine motor is running excellent  but the over current detection feature is working unpredictably. i have been disabled this feature then motor is working good, and there is confusion about the calculations of current threshold. in 'AN4355 Application note' it is written that 'IOCDth = VOCDth × Rds(ON)' which is contradicting the statement of datasheet of l6480, which says ' The L6480 measures the load current of each half-bridge sensing the VDS voltage of all the Power MOSFETs (Figure 12). When any of the VDS voltages rise over the programmed threshold'. i want to understand this OCD feature.

Phlip Cornelissen
Associate III
Posted on July 12, 2017 at 08:41

This abnormal over current detection behaviour is finally cleared. An unoptimized drive configuration with an imporper hardware setup will cause UVLO and OCD errors and in no particular order or at any given rate of occurance, hence a random behaviour so to speak.

Posted on July 12, 2017 at 08:36

Hi,

This statement is true: ' The L6480 measures the load current of each half-bridge sensing the VDS voltage of all the Power MOSFETs (Figure 12). When any of the VDS voltages rise over the programmed threshold'. This measurement of Vds will trigger an overcurrent if exceeding the VOCDth setting. Set this value to a maximum for now to sort out all errors and to get a good grip on how this controller works, then lower it later to what ever value is needed. Also make sure the total charge of the gate (Qg) is below 50nC, the lower the better.

The VOCDth setting is that of the Vds drop over the transistor, which means that VOCDth = IOCDth x Rdson. Make sure your bridge drive is optimized, Igate x tcc slightly greater than Qg. This means that for the different current selections for Igate different tcc values is possible, select the lowest current for the longest time. This is helpfull if you build your own board (own PCB layout), the track length and thickness for the gate drives is very important. The transistors should be as close to the L6480 controller as possible. If it works, increase you current to lower the drive time as needed. Longer and thinner tracks have a higher reactance and a higher current drive will of cause generate a higher voltage drop over the lenght of the track and thus a slower turn on of the mosfets.

This wrong drive setup and improper hardware produces a slow switchon of the transistors, hence the UVLO condition that now also resets the controller and all the registers of cause, that means the status register will be reset to the values at startup.

Posted on July 13, 2017 at 08:55

thank you phlip nice information, 

  I am designing my own pcb so can u suggest me any mosfet with its Igate and Tcc conditions.

Posted on July 13, 2017 at 09:46

Hi,

I use the IRF520N mosfet, it has a maximum Qg of 25nC. You can use the STD25NF10 or even STB35NF10, the Qg of these are typical 55nC, a little bit more difficult to drive...

Start with an Igate current of 8mA with the longest tcc possible, work with this setting until you fugre out all the other settings that works for you. It seems odd, but this way you minimize hardware issues like improper tracks. Then increase the current and lower the time setting in steps (the current selections is fixed steps) until you have a proper setup or what ever setting works for you. Remember that Igate x tcc must be greater than that of your mosfet Qg.