cancel
Showing results for 
Search instead for 
Did you mean: 

3 USART DMA on STM32F405

DAELEEM KWON
Associate
Posted on March 07, 2017 at 02:29

Hi,

I'd like to use 3 USART DMAs on STM32F405.

If I use only 1 USART DMA, it works well.

But if I initialize 3 USART DMA in 1 workspace, only the last one works.

Below are my configurations.

#define USARTx USART2

#define USARTx_CLK_ENABLE() __HAL_RCC_USART2_CLK_ENABLE();

#define DMAx_CLK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE()

#define USARTx_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()

#define USARTx_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()

#define USARTx_FORCE_RESET() __HAL_RCC_USART2_FORCE_RESET()

#define USARTx_RELEASE_RESET() __HAL_RCC_USART2_RELEASE_RESET()

#define USARTx1 USART1

#define USARTx1_CLK_ENABLE() __HAL_RCC_USART1_CLK_ENABLE();

#define DMAx1_CLK_ENABLE() __HAL_RCC_DMA2_CLK_ENABLE()

#define USARTx1_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()

#define USARTx1_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()

#define USARTx1_FORCE_RESET() __HAL_RCC_USART1_FORCE_RESET()

#define USARTx1_RELEASE_RESET() __HAL_RCC_USART1_RELEASE_RESET()

#define USARTx4 UART4

#define USARTx4_CLK_ENABLE() __HAL_RCC_UART4_CLK_ENABLE();

#define DMAx4_CLK_ENABLE() __HAL_RCC_DMA2_CLK_ENABLE()

#define USARTx4_RX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()

#define USARTx4_TX_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()

#define USARTx4_FORCE_RESET() __HAL_RCC_UART4_FORCE_RESET()

#define USARTx4_RELEASE_RESET() __HAL_RCC_UART4_RELEASE_RESET()

/* Definition for USART2 Pins */

#define USARTx_TX_PIN GPIO_PIN_2

#define USARTx_TX_GPIO_PORT GPIOA

#define USARTx_TX_AF GPIO_AF7_USART2

#define USARTx_RX_PIN GPIO_PIN_3

#define USARTx_RX_GPIO_PORT GPIOA

#define USARTx_RX_AF GPIO_AF7_USART2

/* Definition for USART2 DMA */

#define USARTx_TX_DMA_CHANNEL DMA_CHANNEL_4

#define USARTx_TX_DMA_STREAM DMA1_Stream6

#define USARTx_RX_DMA_CHANNEL DMA_CHANNEL_4

#define USARTx_RX_DMA_STREAM DMA1_Stream5

/* Definition for USART2 NVIC */

#define USARTx_DMA_TX_IRQn DMA1_Stream6_IRQn

#define USARTx_DMA_RX_IRQn DMA1_Stream5_IRQn

#define USARTx_DMA_TX_IRQHandler DMA1_Stream6_IRQHandler

#define USARTx_DMA_RX_IRQHandler DMA1_Stream5_IRQHandler

#define USARTx_IRQn USART2_IRQn

#define USARTx_IRQHandler USART2_IRQHandler

/* Definition for USART1 Pins */

#define USARTx1_TX_PIN GPIO_PIN_9

#define USARTx1_TX_GPIO_PORT GPIOA

#define USARTx1_TX_AF GPIO_AF7_USART1

#define USARTx1_RX_PIN GPIO_PIN_10

#define USARTx1_RX_GPIO_PORT GPIOA

#define USARTx1_RX_AF GPIO_AF7_USART1

/* Definition for USART1 DMA */

#define USARTx1_TX_DMA_CHANNEL DMA_CHANNEL_4

#define USARTx1_TX_DMA_STREAM DMA2_Stream7

#define USARTx1_RX_DMA_CHANNEL DMA_CHANNEL_4

#define USARTx1_RX_DMA_STREAM DMA2_Stream5

/* Definition for USART1 NVIC */

#define USARTx1_DMA_TX_IRQn DMA2_Stream7_IRQn

#define USARTx1_DMA_RX_IRQn DMA2_Stream5_IRQn

#define USARTx1_DMA_TX_IRQHandler DMA2_Stream7_IRQHandler

#define USARTx1_DMA_RX_IRQHandler DMA2_Stream5_IRQHandler

#define USARTx1_IRQn USART1_IRQn

#define USARTx1_IRQHandler USART1_IRQHandler

/* Definition for UART4 Pins */

#define USARTx4_TX_PIN GPIO_PIN_0

#define USARTx4_TX_GPIO_PORT GPIOA

#define USARTx4_TX_AF GPIO_AF8_UART4

#define USARTx4_RX_PIN GPIO_PIN_1

#define USARTx4_RX_GPIO_PORT GPIOA

#define USARTx4_RX_AF GPIO_AF8_UART4

/* Definition for UART4 DMA */

#define USARTx4_TX_DMA_CHANNEL DMA_CHANNEL_4

#define USARTx4_TX_DMA_STREAM DMA1_Stream4

#define USARTx4_RX_DMA_CHANNEL DMA_CHANNEL_4

#define USARTx4_RX_DMA_STREAM DMA1_Stream2

/* Definition for UART4 NVIC */

#define USARTx4_DMA_TX_IRQn DMA1_Stream4_IRQn

#define USARTx4_DMA_RX_IRQn DMA1_Stream2_IRQn

#define USARTx4_DMA_TX_IRQHandler DMA1_Stream4_IRQHandler

#define USARTx4_DMA_RX_IRQHandler DMA1_Stream2_IRQHandler

#define USARTx4_IRQn UART4_IRQn

#define USARTx4_IRQHandler UART4_IRQHandler

Can anyone comment on this?

If anyone can comment anything on this, it will be helpful for me.

Thanks,

Danny

3 REPLIES 3
Uwe Bonnes
Principal II
Posted on March 07, 2017 at 11:54

Read and understand RM0090 Chapter 10.3.3. Channel selection

Posted on March 08, 2017 at 18:00

It is just a lot of defines, no code, or linkage. I'm not looking to proof-read your interpretation of the Reference Manual tables.

If it is not working break it down to the individual cases and double check the functionality, and the registers in the debugger.

Tips, Buy me a coffee, or three.. PayPal Venmo
Up vote any posts that you find helpful, it shows what's working..
S.Ma
Principal
Posted on March 08, 2017 at 18:12

Software hygiene first:

#define TEXTA TEXTB just replace TEXTA by TEXTB

For safety, rename the beginning

#define USARTx USART2

etc...

by (for example) USARTx0 USART2....

etc..

At some point, a lookup table of constant with the usart index (1,2,4...) might be easier to manage than a bench of hardcoded defines, and the code might even shrink...